{"title":"900兆赫GSM PA在250纳米CMOS击穿电压保护和可编程的传导角","authors":"K. Choi, D. Allstot, V. Krishnamurthy","doi":"10.1109/RFIC.2004.1320624","DOIUrl":null,"url":null,"abstract":"A three-stage 900 MHz GSM power amplifier implemented in 2 mm/sup 2/ in 250 nm CMOS outputs 2 W and 1-5 W with 30 and 43% drain and power-added efficiencies with 3.0 and 2.5 V power supply voltages, respectively. A cross-coupled self-biased cascode configuration reduces maximum voltage stress in the class-E driver stage to 1.6 V/sub DD/ without the use of additional bias voltages. A programmable conduction angle technique is also introduced and demonstrated.","PeriodicalId":140604,"journal":{"name":"2004 IEE Radio Frequency Integrated Circuits (RFIC) Systems. Digest of Papers","volume":"26 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-06-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"A 900 MHz GSM PA in 250 nm CMOS with breakdown voltage protection and programmable conduction angle\",\"authors\":\"K. Choi, D. Allstot, V. Krishnamurthy\",\"doi\":\"10.1109/RFIC.2004.1320624\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A three-stage 900 MHz GSM power amplifier implemented in 2 mm/sup 2/ in 250 nm CMOS outputs 2 W and 1-5 W with 30 and 43% drain and power-added efficiencies with 3.0 and 2.5 V power supply voltages, respectively. A cross-coupled self-biased cascode configuration reduces maximum voltage stress in the class-E driver stage to 1.6 V/sub DD/ without the use of additional bias voltages. A programmable conduction angle technique is also introduced and demonstrated.\",\"PeriodicalId\":140604,\"journal\":{\"name\":\"2004 IEE Radio Frequency Integrated Circuits (RFIC) Systems. Digest of Papers\",\"volume\":\"26 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2004-06-06\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2004 IEE Radio Frequency Integrated Circuits (RFIC) Systems. Digest of Papers\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/RFIC.2004.1320624\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2004 IEE Radio Frequency Integrated Circuits (RFIC) Systems. Digest of Papers","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIC.2004.1320624","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 900 MHz GSM PA in 250 nm CMOS with breakdown voltage protection and programmable conduction angle
A three-stage 900 MHz GSM power amplifier implemented in 2 mm/sup 2/ in 250 nm CMOS outputs 2 W and 1-5 W with 30 and 43% drain and power-added efficiencies with 3.0 and 2.5 V power supply voltages, respectively. A cross-coupled self-biased cascode configuration reduces maximum voltage stress in the class-E driver stage to 1.6 V/sub DD/ without the use of additional bias voltages. A programmable conduction angle technique is also introduced and demonstrated.
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