David Bierbuesse, F. Dietrich, Eduard Heidebrecht, R. Negra
{"title":"RapidIP -射频电路的快速通用合成","authors":"David Bierbuesse, F. Dietrich, Eduard Heidebrecht, R. Negra","doi":"10.1109/SMACD58065.2023.10192113","DOIUrl":null,"url":null,"abstract":"A fast and universal approach of complex RF-circuit synthesis is presented. By means of generic design algorithms and efficient methods of circuit analysis, thousands of different circuit topologies can be evaluated and optimized within minutes. Universality is demonstrated by the synthesis of 4 RF-power amplifiers in 150 nm GaN and 130 nm SiGe for the operation in the 17 GHz to 21 GHz and 180 GHz to 220 GHz frequency band. The power amplifiers show competitive large signal performance in terms of gain and power-added efficiency with up to 38%. The required synthesis runtime does not exceed 22 minutes.","PeriodicalId":239306,"journal":{"name":"2023 19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)","volume":"42 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2023-07-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"RapidIP - Fast & Universal Synthesis of RF-Circuits\",\"authors\":\"David Bierbuesse, F. Dietrich, Eduard Heidebrecht, R. Negra\",\"doi\":\"10.1109/SMACD58065.2023.10192113\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A fast and universal approach of complex RF-circuit synthesis is presented. By means of generic design algorithms and efficient methods of circuit analysis, thousands of different circuit topologies can be evaluated and optimized within minutes. Universality is demonstrated by the synthesis of 4 RF-power amplifiers in 150 nm GaN and 130 nm SiGe for the operation in the 17 GHz to 21 GHz and 180 GHz to 220 GHz frequency band. The power amplifiers show competitive large signal performance in terms of gain and power-added efficiency with up to 38%. The required synthesis runtime does not exceed 22 minutes.\",\"PeriodicalId\":239306,\"journal\":{\"name\":\"2023 19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)\",\"volume\":\"42 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2023-07-03\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2023 19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SMACD58065.2023.10192113\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2023 19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SMACD58065.2023.10192113","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
RapidIP - Fast & Universal Synthesis of RF-Circuits
A fast and universal approach of complex RF-circuit synthesis is presented. By means of generic design algorithms and efficient methods of circuit analysis, thousands of different circuit topologies can be evaluated and optimized within minutes. Universality is demonstrated by the synthesis of 4 RF-power amplifiers in 150 nm GaN and 130 nm SiGe for the operation in the 17 GHz to 21 GHz and 180 GHz to 220 GHz frequency band. The power amplifiers show competitive large signal performance in terms of gain and power-added efficiency with up to 38%. The required synthesis runtime does not exceed 22 minutes.