轮廓显示生成算法的VLSI实现

M. Zyda
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引用次数: 6

摘要

最近的文章讨论了目前的趋势,设计栅格图形算法到VLSI芯片。这些设计努力的目的是捕捉矢量图形系统中发现的一些实时动画功能。目前,实时矢量图形动画主要局限于涉及坐标变换的操作。为了增强这种动画能力,必须识别出经常遇到的需要超大规模集成电路高速并行计算能力的矢量图形算法。从网格数据实时生成轮廓显示就是这样一种算法。本文介绍了一种轮廓显示生成算法的具体实现,实现该算法的处理器的体系结构框架以及处理器的体系结构要求。轮廓算法基于轮廓树的数据结构,其规律性和可并行计算性使其成为超大规模集成电路的理想选择。讨论了在交互式图形实时环境中执行该算法的轮廓处理器芯片的体系结构框架,特别是内存大小和数据分布问题。为了确定在该体系结构框架中轮廓处理器的必要物理参数,创建了轮廓过程的模型。最后,我们得出结论,生产一个执行此轮廓算法的VLSI芯片是可行的。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A contour display generation algorithm for VLSI implementation
Recent articles have discussed the current trend towards designing raster graphics algorithms into VLSI chips. The purpose of these design efforts is to capture some of the real-time animation capability found in vector graphics systems. Currently, real-time vector graphics animation is limited primarily to operations involving coordinate transformations. In order to enhance this animation capability, frequently encountered vector graphics algorithms that require the high speed, parallel computation capability of VLSI must be identified. Real-time contour display generation from grid data is one such algorithm. This paper describes the specifics of a contour display generation algorithm, the architectural framework of a processor that performs this algorithm and the architectural requirements of such a processor. The contouring algorithm is based on a data structure, the contouring tree, whose regularity and amenability for parallel computation make it an ideal candidate for VLSI. The architectural framework for a contouring processor chip that performs this algorithm for the real-time environment of interactive graphics is discussed, particularly the issues of memory size and data distribution. A model of the contouring process is created in order to determine the necessary physical parameters of the contouring processor in this architectural framework. Conclusions are drawn concerning the feasibility of producing a VLSI chip that performs this contouring algorithm.
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