Samer Moein, F. Gebali, T. Gulliver, M. El-Kharashi
{"title":"硬件攻击风险评估","authors":"Samer Moein, F. Gebali, T. Gulliver, M. El-Kharashi","doi":"10.1109/ICCES.2015.7393073","DOIUrl":null,"url":null,"abstract":"Modern VLSI chips have high complexity and usually contain cryptographic processors to protect their data and external communications. Attackers target the hardware to imitate or understand the system design, gain access to the system or obtain encryption keys. They may also want to initiate attacks such as denial of service to disable the services supported by a chip, or reduce system reliability. In this paper, risk levels are defined for hardware attacks based on the accessibility, resources, and time required to successfully attack a system.","PeriodicalId":227813,"journal":{"name":"2015 Tenth International Conference on Computer Engineering & Systems (ICCES)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"Hardware attack risk assessment\",\"authors\":\"Samer Moein, F. Gebali, T. Gulliver, M. El-Kharashi\",\"doi\":\"10.1109/ICCES.2015.7393073\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Modern VLSI chips have high complexity and usually contain cryptographic processors to protect their data and external communications. Attackers target the hardware to imitate or understand the system design, gain access to the system or obtain encryption keys. They may also want to initiate attacks such as denial of service to disable the services supported by a chip, or reduce system reliability. In this paper, risk levels are defined for hardware attacks based on the accessibility, resources, and time required to successfully attack a system.\",\"PeriodicalId\":227813,\"journal\":{\"name\":\"2015 Tenth International Conference on Computer Engineering & Systems (ICCES)\",\"volume\":\"31 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 Tenth International Conference on Computer Engineering & Systems (ICCES)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICCES.2015.7393073\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 Tenth International Conference on Computer Engineering & Systems (ICCES)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCES.2015.7393073","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Modern VLSI chips have high complexity and usually contain cryptographic processors to protect their data and external communications. Attackers target the hardware to imitate or understand the system design, gain access to the system or obtain encryption keys. They may also want to initiate attacks such as denial of service to disable the services supported by a chip, or reduce system reliability. In this paper, risk levels are defined for hardware attacks based on the accessibility, resources, and time required to successfully attack a system.