{"title":"平衡并联SiC mosfet不均匀温度分布的闭环控制设计","authors":"Christoph Lüdecke, Niklas Fritz, R. D. De Doncker","doi":"10.23919/ICPE2023-ECCEAsia54778.2023.10213553","DOIUrl":null,"url":null,"abstract":"In this work, a gate driver is presented that allows to balance the temperature of parallel-connected silicon carbide (SiC) metal-oxide-semiconductor field-effect transistors (MOSFETs) with a closed-loop control. In conventional gate drivers, switching events are often slowed down to avoid unevenly distributed losses of parallel-connected SiC MOSFETs. Due to the reduced switching speed, wide-bandgap (WBG) semiconductor devices are not fully utilized. The presented gate driver selectively delays the individual gate signals of the parallel-connected MOSFETs to influence the switching losses. To balance the temperature of the MOSFETs during operation, a closed-loop control is designed and verified by measurements. The presented gate driver thus enables a balanced stress of parallel-connected MOSFETs and a uniform aging of the MOSFETs. Therefore, the potential of parallel-connected WBG semiconductor devices can be better utilized and a derating of the system is avoided.","PeriodicalId":151155,"journal":{"name":"2023 11th International Conference on Power Electronics and ECCE Asia (ICPE 2023 - ECCE Asia)","volume":"138 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2023-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Design of a Closed-Loop Control to Balance Unequal Temperature Distributions of Parallel-Connected SiC MOSFETs\",\"authors\":\"Christoph Lüdecke, Niklas Fritz, R. D. De Doncker\",\"doi\":\"10.23919/ICPE2023-ECCEAsia54778.2023.10213553\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this work, a gate driver is presented that allows to balance the temperature of parallel-connected silicon carbide (SiC) metal-oxide-semiconductor field-effect transistors (MOSFETs) with a closed-loop control. In conventional gate drivers, switching events are often slowed down to avoid unevenly distributed losses of parallel-connected SiC MOSFETs. Due to the reduced switching speed, wide-bandgap (WBG) semiconductor devices are not fully utilized. The presented gate driver selectively delays the individual gate signals of the parallel-connected MOSFETs to influence the switching losses. To balance the temperature of the MOSFETs during operation, a closed-loop control is designed and verified by measurements. The presented gate driver thus enables a balanced stress of parallel-connected MOSFETs and a uniform aging of the MOSFETs. Therefore, the potential of parallel-connected WBG semiconductor devices can be better utilized and a derating of the system is avoided.\",\"PeriodicalId\":151155,\"journal\":{\"name\":\"2023 11th International Conference on Power Electronics and ECCE Asia (ICPE 2023 - ECCE Asia)\",\"volume\":\"138 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2023-05-22\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2023 11th International Conference on Power Electronics and ECCE Asia (ICPE 2023 - ECCE Asia)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.23919/ICPE2023-ECCEAsia54778.2023.10213553\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2023 11th International Conference on Power Electronics and ECCE Asia (ICPE 2023 - ECCE Asia)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/ICPE2023-ECCEAsia54778.2023.10213553","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Design of a Closed-Loop Control to Balance Unequal Temperature Distributions of Parallel-Connected SiC MOSFETs
In this work, a gate driver is presented that allows to balance the temperature of parallel-connected silicon carbide (SiC) metal-oxide-semiconductor field-effect transistors (MOSFETs) with a closed-loop control. In conventional gate drivers, switching events are often slowed down to avoid unevenly distributed losses of parallel-connected SiC MOSFETs. Due to the reduced switching speed, wide-bandgap (WBG) semiconductor devices are not fully utilized. The presented gate driver selectively delays the individual gate signals of the parallel-connected MOSFETs to influence the switching losses. To balance the temperature of the MOSFETs during operation, a closed-loop control is designed and verified by measurements. The presented gate driver thus enables a balanced stress of parallel-connected MOSFETs and a uniform aging of the MOSFETs. Therefore, the potential of parallel-connected WBG semiconductor devices can be better utilized and a derating of the system is avoided.