{"title":"光互连系统设计采用自顶向下的设计方法","authors":"M. A. Pitts, M. S. Foster","doi":"10.1109/NORTHC.1994.643344","DOIUrl":null,"url":null,"abstract":"Ever increasing system complexities, limited development resources, and the desire to implement flexible dual use applications are driving the need to reduce system design time, development costs, and risks. Development cost and design time can be reduced by minimizing design iterations and identifying roadblocks early in the design cycle. In addition, utilizing a hierarchical top down process that facilitates accurate timely requirements tracking, and top down system modeling/validation minimizes risks and supports flexibility. The Boeing Optical Interconnect System (BOIS) development is a representative example of a complex system design using a top down VHDL design, modeling, and validation process. Program development costs, design time, and risks were minimized while application flexibility was maintained.","PeriodicalId":218454,"journal":{"name":"Proceedings of NORTHCON '94","volume":"21 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1994-10-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Optical interconnect system design using a top down design approach\",\"authors\":\"M. A. Pitts, M. S. Foster\",\"doi\":\"10.1109/NORTHC.1994.643344\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Ever increasing system complexities, limited development resources, and the desire to implement flexible dual use applications are driving the need to reduce system design time, development costs, and risks. Development cost and design time can be reduced by minimizing design iterations and identifying roadblocks early in the design cycle. In addition, utilizing a hierarchical top down process that facilitates accurate timely requirements tracking, and top down system modeling/validation minimizes risks and supports flexibility. The Boeing Optical Interconnect System (BOIS) development is a representative example of a complex system design using a top down VHDL design, modeling, and validation process. Program development costs, design time, and risks were minimized while application flexibility was maintained.\",\"PeriodicalId\":218454,\"journal\":{\"name\":\"Proceedings of NORTHCON '94\",\"volume\":\"21 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1994-10-11\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of NORTHCON '94\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/NORTHC.1994.643344\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of NORTHCON '94","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NORTHC.1994.643344","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Optical interconnect system design using a top down design approach
Ever increasing system complexities, limited development resources, and the desire to implement flexible dual use applications are driving the need to reduce system design time, development costs, and risks. Development cost and design time can be reduced by minimizing design iterations and identifying roadblocks early in the design cycle. In addition, utilizing a hierarchical top down process that facilitates accurate timely requirements tracking, and top down system modeling/validation minimizes risks and supports flexibility. The Boeing Optical Interconnect System (BOIS) development is a representative example of a complex system design using a top down VHDL design, modeling, and validation process. Program development costs, design time, and risks were minimized while application flexibility was maintained.