Kamyar Keikhosravy, Pouya Kamalinejad, S. Mirabbasi, Victor C. M. Leung
{"title":"一种0.13 μm CMOS宽带单位增益缓冲器","authors":"Kamyar Keikhosravy, Pouya Kamalinejad, S. Mirabbasi, Victor C. M. Leung","doi":"10.1109/ICECS.2013.6815332","DOIUrl":null,"url":null,"abstract":"In this paper, an ultra wideband analog voltage-mode buffer is presented which can drive a load impedance of 50 Ω. The presented feedback-based buffer uses a compound amplifier which is a parallel combination of a high-DC gain operational amplifier and a operation transconductance amplifier to achieve a high unity gain bandwidth. A proof-of-concept prototype is designed and fabricated in a 0.13 μm CMOS process. The simulation and measurement results of the proposed buffer are in good agreement. The prototype buffer circuit consumes 7.34 mW from a 1.3-V supply, while buffering a 2 GHz sinusoidal input signal with a 0.4 V peak-to-peak (Vpp) amplitude and driving an AC-coupled 50-Ω load.","PeriodicalId":117453,"journal":{"name":"2013 IEEE 20th International Conference on Electronics, Circuits, and Systems (ICECS)","volume":"516 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":"{\"title\":\"A wideband unity-gain buffer in 0.13-μm CMOS\",\"authors\":\"Kamyar Keikhosravy, Pouya Kamalinejad, S. Mirabbasi, Victor C. M. Leung\",\"doi\":\"10.1109/ICECS.2013.6815332\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, an ultra wideband analog voltage-mode buffer is presented which can drive a load impedance of 50 Ω. The presented feedback-based buffer uses a compound amplifier which is a parallel combination of a high-DC gain operational amplifier and a operation transconductance amplifier to achieve a high unity gain bandwidth. A proof-of-concept prototype is designed and fabricated in a 0.13 μm CMOS process. The simulation and measurement results of the proposed buffer are in good agreement. The prototype buffer circuit consumes 7.34 mW from a 1.3-V supply, while buffering a 2 GHz sinusoidal input signal with a 0.4 V peak-to-peak (Vpp) amplitude and driving an AC-coupled 50-Ω load.\",\"PeriodicalId\":117453,\"journal\":{\"name\":\"2013 IEEE 20th International Conference on Electronics, Circuits, and Systems (ICECS)\",\"volume\":\"516 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2013-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"8\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2013 IEEE 20th International Conference on Electronics, Circuits, and Systems (ICECS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICECS.2013.6815332\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 IEEE 20th International Conference on Electronics, Circuits, and Systems (ICECS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICECS.2013.6815332","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
In this paper, an ultra wideband analog voltage-mode buffer is presented which can drive a load impedance of 50 Ω. The presented feedback-based buffer uses a compound amplifier which is a parallel combination of a high-DC gain operational amplifier and a operation transconductance amplifier to achieve a high unity gain bandwidth. A proof-of-concept prototype is designed and fabricated in a 0.13 μm CMOS process. The simulation and measurement results of the proposed buffer are in good agreement. The prototype buffer circuit consumes 7.34 mW from a 1.3-V supply, while buffering a 2 GHz sinusoidal input signal with a 0.4 V peak-to-peak (Vpp) amplitude and driving an AC-coupled 50-Ω load.