{"title":"与LCD面板驱动器兼容的无补偿鲁棒轨对轨新型放大器结构","authors":"Imtinan B. Attili, S. Mahmoud","doi":"10.1109/ISOCC47750.2019.9027714","DOIUrl":null,"url":null,"abstract":"A new rail-to-rail amplifier structure that requires no compensation for the use as a channel buffer in column driver ICs of liquid crystal display (LCD) panels is introduced. The proposed amplifier utilizes current splitting technique applied on a rail-to-rail differential pair. Simulation results for 90 nm CMOS technology on LTSPICE under 1 V supply voltage is provided. Open loop simulations show that the proposed amplifier is capable of achieving high DC gain of 75.5 dB, high transconductance of 350μA/V, high output resistance of 22.2 MΩ with a phase margin of 80° and power consumption of 4.7 μWatt. When configured as a buffer, the amplifier exhibits rail-to-rail operation with low total harmonic distortion (THD) ranging from −66 to −53 dB only corresponding to an input voltage ranging from 0.2 to 1 Vp-p at 10 kHz frequency. For a step input, the output has a fast response with a rise and fall time of 1.56μs and 1.5μs respectively.","PeriodicalId":113802,"journal":{"name":"2019 International SoC Design Conference (ISOCC)","volume":"22 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Uncompensated Robust Rail-to-Rail New Amplifier Structure Compatible with Drivers of LCD Panels\",\"authors\":\"Imtinan B. Attili, S. Mahmoud\",\"doi\":\"10.1109/ISOCC47750.2019.9027714\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A new rail-to-rail amplifier structure that requires no compensation for the use as a channel buffer in column driver ICs of liquid crystal display (LCD) panels is introduced. The proposed amplifier utilizes current splitting technique applied on a rail-to-rail differential pair. Simulation results for 90 nm CMOS technology on LTSPICE under 1 V supply voltage is provided. Open loop simulations show that the proposed amplifier is capable of achieving high DC gain of 75.5 dB, high transconductance of 350μA/V, high output resistance of 22.2 MΩ with a phase margin of 80° and power consumption of 4.7 μWatt. When configured as a buffer, the amplifier exhibits rail-to-rail operation with low total harmonic distortion (THD) ranging from −66 to −53 dB only corresponding to an input voltage ranging from 0.2 to 1 Vp-p at 10 kHz frequency. For a step input, the output has a fast response with a rise and fall time of 1.56μs and 1.5μs respectively.\",\"PeriodicalId\":113802,\"journal\":{\"name\":\"2019 International SoC Design Conference (ISOCC)\",\"volume\":\"22 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2019 International SoC Design Conference (ISOCC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISOCC47750.2019.9027714\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 International SoC Design Conference (ISOCC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISOCC47750.2019.9027714","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Uncompensated Robust Rail-to-Rail New Amplifier Structure Compatible with Drivers of LCD Panels
A new rail-to-rail amplifier structure that requires no compensation for the use as a channel buffer in column driver ICs of liquid crystal display (LCD) panels is introduced. The proposed amplifier utilizes current splitting technique applied on a rail-to-rail differential pair. Simulation results for 90 nm CMOS technology on LTSPICE under 1 V supply voltage is provided. Open loop simulations show that the proposed amplifier is capable of achieving high DC gain of 75.5 dB, high transconductance of 350μA/V, high output resistance of 22.2 MΩ with a phase margin of 80° and power consumption of 4.7 μWatt. When configured as a buffer, the amplifier exhibits rail-to-rail operation with low total harmonic distortion (THD) ranging from −66 to −53 dB only corresponding to an input voltage ranging from 0.2 to 1 Vp-p at 10 kHz frequency. For a step input, the output has a fast response with a rise and fall time of 1.56μs and 1.5μs respectively.
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