在裸机多核架构上运行Web服务器的设计问题

N. Soundararajan, R. Karne, A. Wijesinha, Navid Ordouie, Hojin Chang
{"title":"在裸机多核架构上运行Web服务器的设计问题","authors":"N. Soundararajan, R. Karne, A. Wijesinha, Navid Ordouie, Hojin Chang","doi":"10.1109/COMPSAC48688.2020.0-195","DOIUrl":null,"url":null,"abstract":"We consider the design and implementation of a bare PC Web server with no OS or kernel running on a multicore architecture. Previous work has demonstrated initialization, loading and running of a 32-bit web server on a single core in a multicore configured system. The main design issues that need to be addressed are balancing the load, designing re-entrant code, enforcing concurrency control, partitioning network logic, sharing the network interface and designing multi-tasking execution. We describe a novel bare PC Web server architecture and design for addressing these issues. We also provide initial performance measurements that demonstrate the feasibility of this architecture and its implementation. It is shown that with this design and implementation, the main bottleneck impeding multicore parallelism is using a single Ethernet card in the system to handle multiple cores. This work serves as a basis for identifying issues that may exist in other networking and multicore configurations for a bare PC Web server","PeriodicalId":430098,"journal":{"name":"2020 IEEE 44th Annual Computers, Software, and Applications Conference (COMPSAC)","volume":"205 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"Design Issues in Running a Web Server on Bare PC Multi-Core Architecture\",\"authors\":\"N. Soundararajan, R. Karne, A. Wijesinha, Navid Ordouie, Hojin Chang\",\"doi\":\"10.1109/COMPSAC48688.2020.0-195\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We consider the design and implementation of a bare PC Web server with no OS or kernel running on a multicore architecture. Previous work has demonstrated initialization, loading and running of a 32-bit web server on a single core in a multicore configured system. The main design issues that need to be addressed are balancing the load, designing re-entrant code, enforcing concurrency control, partitioning network logic, sharing the network interface and designing multi-tasking execution. We describe a novel bare PC Web server architecture and design for addressing these issues. We also provide initial performance measurements that demonstrate the feasibility of this architecture and its implementation. It is shown that with this design and implementation, the main bottleneck impeding multicore parallelism is using a single Ethernet card in the system to handle multiple cores. This work serves as a basis for identifying issues that may exist in other networking and multicore configurations for a bare PC Web server\",\"PeriodicalId\":430098,\"journal\":{\"name\":\"2020 IEEE 44th Annual Computers, Software, and Applications Conference (COMPSAC)\",\"volume\":\"205 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-07-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 IEEE 44th Annual Computers, Software, and Applications Conference (COMPSAC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/COMPSAC48688.2020.0-195\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE 44th Annual Computers, Software, and Applications Conference (COMPSAC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/COMPSAC48688.2020.0-195","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4

摘要

我们考虑在多核架构上设计和实现一个没有操作系统或内核的裸PC Web服务器。以前的工作已经演示了在多核配置系统的单核上初始化,加载和运行32位web服务器。需要解决的主要设计问题是平衡负载、设计可重入代码、实施并发控制、划分网络逻辑、共享网络接口和设计多任务执行。我们描述了一种新的裸PC Web服务器体系结构和设计来解决这些问题。我们还提供了初步的性能度量,以证明该体系结构及其实现的可行性。结果表明,在这种设计和实现中,阻碍多核并行的主要瓶颈是在系统中使用单个以太网卡来处理多核。这项工作可作为确定裸机PC Web服务器的其他网络和多核配置中可能存在的问题的基础
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Design Issues in Running a Web Server on Bare PC Multi-Core Architecture
We consider the design and implementation of a bare PC Web server with no OS or kernel running on a multicore architecture. Previous work has demonstrated initialization, loading and running of a 32-bit web server on a single core in a multicore configured system. The main design issues that need to be addressed are balancing the load, designing re-entrant code, enforcing concurrency control, partitioning network logic, sharing the network interface and designing multi-tasking execution. We describe a novel bare PC Web server architecture and design for addressing these issues. We also provide initial performance measurements that demonstrate the feasibility of this architecture and its implementation. It is shown that with this design and implementation, the main bottleneck impeding multicore parallelism is using a single Ethernet card in the system to handle multiple cores. This work serves as a basis for identifying issues that may exist in other networking and multicore configurations for a bare PC Web server
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信