低电压低功率4位数模转换器

M. Bchir, Imen Aloui, N. Hassen, K. Besbes
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引用次数: 1

摘要

本文提出了一种新型的高速、低压、低功耗电流型数模转换器(DAC),该转换器采用传统技术(GD)和非传统技术——大块驱动准浮栅技术(BD-QFG)。采用GD和BD-QFG技术对所提出的DAC的性能进行了仿真。与GD DAC相比,基于BD-QFG的DAC在动态性能、电源电压和功耗方面表现出较高的性能。采用0.18 μm CMOS技术对传统和非常规4位DAC进行了仿真。该电路已通过ELDO模拟器进行了仿真。BD-QFG DAC实现了带宽(750 MHz),低功耗(0.114 mW),低电源电压(0.8V)。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Low voltage low power 4 bits digital to analog converter
Novel high speed, low voltage (LV) low power (LP) current mode digital to analog converter (DAC) using the conventional technique (GD) an unconventional technique bulk driven quasi floating gate technique (BD-QFG) is presented in this paper. The performance of the proposed DAC has been simulated using the GD and the BD-QFG technique. The DAC based in the BD-QFG showed high performance in terms of dynamic performances, supply voltage, and power consumption in comparison to the GD DAC. The conventional and unconventional 4 bits DAC has been simulated in 0.18 μm CMOS technology. The proposed circuit has been simulated through an ELDO simulator. The BD-QFG DAC achieves a bandwidth (750 MHz), low power consumption (0.114 mW), low supply voltage (0.8V).
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