J. Zeng, Raunak Kumar, T. Tsai, Sevashanmugam Marimuthu, R. Gauthier
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Optimization of NPN ESD Protection Device for Improved Failure Current
This paper presents a high voltage NPN based ESD protection device with a designed PBL under collector region. Experiment on silicon shows it achieves 2.7X failure current improvement compared to structure without PBL. It has a flexible feature of tunable trigger voltage and holding voltage without It2 degradation.