基于inp的HEMT技术的90Gb/s 2:1多路复用IC

2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315) Pub Date : 2002-08-07 DOI:10.1109/ISSCC.2002.993001

Toshihide Suzuki, Y. Nakasha, Tsuyoshi Takahashi, K. Makiyama, Kenji Imanishi, Tatsuya Hirose, Yuu Watanabe

{"title":"基于inp的HEMT技术的90Gb/s 2:1多路复用IC","authors":"Toshihide Suzuki, Y. Nakasha, Tsuyoshi Takahashi, K. Makiyama, Kenji Imanishi, Tatsuya Hirose, Yuu Watanabe","doi":"10.1109/ISSCC.2002.993001","DOIUrl":null,"url":null,"abstract":"A 90Gb/s 2:1 multiplexer IC uses 0.13/spl mu/m-gate InP-based HEMT technology. Parallel 2-ch input data are serialized. The differential outputs are 0.7V/sub pp/. The 1.9/spl times/1.8mm/sup 2/ die consumes 1.3W from a -5.2V supply.","PeriodicalId":423674,"journal":{"name":"2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315)","volume":"108 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"25","resultStr":"{\"title\":\"A 90Gb/s 2:1 multiplexer IC in InP-based HEMT technology\",\"authors\":\"Toshihide Suzuki, Y. Nakasha, Tsuyoshi Takahashi, K. Makiyama, Kenji Imanishi, Tatsuya Hirose, Yuu Watanabe\",\"doi\":\"10.1109/ISSCC.2002.993001\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A 90Gb/s 2:1 multiplexer IC uses 0.13/spl mu/m-gate InP-based HEMT technology. Parallel 2-ch input data are serialized. The differential outputs are 0.7V/sub pp/. The 1.9/spl times/1.8mm/sup 2/ die consumes 1.3W from a -5.2V supply.\",\"PeriodicalId\":423674,\"journal\":{\"name\":\"2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315)\",\"volume\":\"108 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2002-08-07\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"25\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISSCC.2002.993001\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.2002.993001","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 25

摘要

90Gb/s 2:1多路复用IC采用0.13/spl mu/m栅极基于inp的HEMT技术。并行的2-ch输入数据被序列化。差分输出为0.7V/sub / pp/。1.9/spl倍/1.8mm/sup 2/晶片从-5.2V电源消耗1.3W。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文本刊更多论文

A 90Gb/s 2:1 multiplexer IC in InP-based HEMT technology

A 90Gb/s 2:1 multiplexer IC uses 0.13/spl mu/m-gate InP-based HEMT technology. Parallel 2-ch input data are serialized. The differential outputs are 0.7V/sub pp/. The 1.9/spl times/1.8mm/sup 2/ die consumes 1.3W from a -5.2V supply.

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315)

自引率

0.00%

发文量