{"title":"基于cpp的误差补偿高效近似乘法器","authors":"Qi Shen, Renyuan Zhang, Hao Zhang, Hao Cai, Bo Liu, Jian Xiao","doi":"10.1109/ICTA56932.2022.9963083","DOIUrl":null,"url":null,"abstract":"As one of the most promising energy-efficient paradigms in deploying Neural Network (NN) on hardware, approximate computing ($A$ xC) has recently gained great traction to replace exact computing. This paper proposes an efficient approximate multiplier design method, which combines the Cartesian Genetic Programming (CGP)-based automatic design method and manual design method. Besides, an error compensation scheme based on the traversal search of truth table is proposed for higher-order multiplier construction. Experiments show that compared to exact multiplier, the proposed approximate multiplier can reduce the area, power consumption, and delay by 54.9%, 55.7%, and 36.86%, respectively. It also shows superiority to the state-of-the-art approximate multiplier. In addition, when deployed in LeNet-5 for MINIST datasets, the proposed multipliers show higher efficiency than exact multiplier with comparable recognition accuracy.","PeriodicalId":325602,"journal":{"name":"2022 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)","volume":"159 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-10-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A CGP-based Efficient Approximate Multiplier with Error Compensation\",\"authors\":\"Qi Shen, Renyuan Zhang, Hao Zhang, Hao Cai, Bo Liu, Jian Xiao\",\"doi\":\"10.1109/ICTA56932.2022.9963083\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"As one of the most promising energy-efficient paradigms in deploying Neural Network (NN) on hardware, approximate computing ($A$ xC) has recently gained great traction to replace exact computing. This paper proposes an efficient approximate multiplier design method, which combines the Cartesian Genetic Programming (CGP)-based automatic design method and manual design method. Besides, an error compensation scheme based on the traversal search of truth table is proposed for higher-order multiplier construction. Experiments show that compared to exact multiplier, the proposed approximate multiplier can reduce the area, power consumption, and delay by 54.9%, 55.7%, and 36.86%, respectively. It also shows superiority to the state-of-the-art approximate multiplier. In addition, when deployed in LeNet-5 for MINIST datasets, the proposed multipliers show higher efficiency than exact multiplier with comparable recognition accuracy.\",\"PeriodicalId\":325602,\"journal\":{\"name\":\"2022 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)\",\"volume\":\"159 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-10-28\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2022 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICTA56932.2022.9963083\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICTA56932.2022.9963083","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A CGP-based Efficient Approximate Multiplier with Error Compensation
As one of the most promising energy-efficient paradigms in deploying Neural Network (NN) on hardware, approximate computing ($A$ xC) has recently gained great traction to replace exact computing. This paper proposes an efficient approximate multiplier design method, which combines the Cartesian Genetic Programming (CGP)-based automatic design method and manual design method. Besides, an error compensation scheme based on the traversal search of truth table is proposed for higher-order multiplier construction. Experiments show that compared to exact multiplier, the proposed approximate multiplier can reduce the area, power consumption, and delay by 54.9%, 55.7%, and 36.86%, respectively. It also shows superiority to the state-of-the-art approximate multiplier. In addition, when deployed in LeNet-5 for MINIST datasets, the proposed multipliers show higher efficiency than exact multiplier with comparable recognition accuracy.