{"title":"CMOS asic中的地反弹","authors":"D. Steele","doi":"10.1109/ASIC.1989.123224","DOIUrl":null,"url":null,"abstract":"A study has been undertaken to investigate the ground bounce phenomena in CMOS ASICs (application-specific integrated circuits). A simple mathematical analysis was performed to help gain an intuitive understanding of the problem. SPICE simulations were then performed to build a more detailed model. The SPICE model allowed different problem solving approaches to be compared in a straightforward manner. Laboratory experiments were performed to confirm the validity of the simulation and mathematical analyses. The results indicate that there are effective measures which can be taken to reduce the magnitude of voltage transients induced by the device and to minimize the device's sensitivity to ground bounce.<<ETX>>","PeriodicalId":245997,"journal":{"name":"Proceedings., Second Annual IEEE ASIC Seminar and Exhibit,","volume":"75 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1989-09-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Ground bounce in CMOS ASICs\",\"authors\":\"D. Steele\",\"doi\":\"10.1109/ASIC.1989.123224\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A study has been undertaken to investigate the ground bounce phenomena in CMOS ASICs (application-specific integrated circuits). A simple mathematical analysis was performed to help gain an intuitive understanding of the problem. SPICE simulations were then performed to build a more detailed model. The SPICE model allowed different problem solving approaches to be compared in a straightforward manner. Laboratory experiments were performed to confirm the validity of the simulation and mathematical analyses. The results indicate that there are effective measures which can be taken to reduce the magnitude of voltage transients induced by the device and to minimize the device's sensitivity to ground bounce.<<ETX>>\",\"PeriodicalId\":245997,\"journal\":{\"name\":\"Proceedings., Second Annual IEEE ASIC Seminar and Exhibit,\",\"volume\":\"75 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1989-09-25\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings., Second Annual IEEE ASIC Seminar and Exhibit,\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASIC.1989.123224\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings., Second Annual IEEE ASIC Seminar and Exhibit,","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASIC.1989.123224","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A study has been undertaken to investigate the ground bounce phenomena in CMOS ASICs (application-specific integrated circuits). A simple mathematical analysis was performed to help gain an intuitive understanding of the problem. SPICE simulations were then performed to build a more detailed model. The SPICE model allowed different problem solving approaches to be compared in a straightforward manner. Laboratory experiments were performed to confirm the validity of the simulation and mathematical analyses. The results indicate that there are effective measures which can be taken to reduce the magnitude of voltage transients induced by the device and to minimize the device's sensitivity to ground bounce.<>
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