{"title":"用于模拟电路仿真的亚微米通道MOS晶体管跨导的紧凑模型","authors":"G. Brezeanu, A. Sevcenco","doi":"10.1109/ISSCS.2007.4292673","DOIUrl":null,"url":null,"abstract":"An analytical model to estimate the submicron MOS channel transconductance is presented. The model is continuous between conditions where velocity saturation can be either dominant or negligible, depending on the CMOS processes and bias voltages. New parameters are proposed for the description of the saturation velocity effects.","PeriodicalId":225101,"journal":{"name":"2007 International Symposium on Signals, Circuits and Systems","volume":"254 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-07-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"A Compact Model of Submicron Channel MOS Transistor Transconductance for Analog Circuit Simulation\",\"authors\":\"G. Brezeanu, A. Sevcenco\",\"doi\":\"10.1109/ISSCS.2007.4292673\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"An analytical model to estimate the submicron MOS channel transconductance is presented. The model is continuous between conditions where velocity saturation can be either dominant or negligible, depending on the CMOS processes and bias voltages. New parameters are proposed for the description of the saturation velocity effects.\",\"PeriodicalId\":225101,\"journal\":{\"name\":\"2007 International Symposium on Signals, Circuits and Systems\",\"volume\":\"254 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2007-07-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2007 International Symposium on Signals, Circuits and Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISSCS.2007.4292673\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 International Symposium on Signals, Circuits and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCS.2007.4292673","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A Compact Model of Submicron Channel MOS Transistor Transconductance for Analog Circuit Simulation
An analytical model to estimate the submicron MOS channel transconductance is presented. The model is continuous between conditions where velocity saturation can be either dominant or negligible, depending on the CMOS processes and bias voltages. New parameters are proposed for the description of the saturation velocity effects.