利用单极TFT技术实现节能、全摆幅解码器

Qing Li, Czang-Ho Lee, W. Wong, M. Sachdev
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引用次数: 1

摘要

实现全摆幅逻辑门是一个挑战,仅使用一种晶体管类型。大多数这样的逻辑门没有充分摆幅与过多的直接通路漏电流。因此,多级逻辑电路的实现变得不现实。在本文中,我们提出了不受这些问题影响的逻辑门的设计。作为概念验证,我们制造了一个只有n型a- si:H tft的3- 8解码器。仿真和测量结果表明,与其他实现相比,该电路可以保持统一的级间增益,同时减少85%以上的静态泄漏电流和20%以上的面积。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Realization of an Energy-Efficient, Full-Swing Decoder with Unipolar TFT Technology
Realization of full-swing logic gates is a challenge using only one transistor type. Most such logic gates do not have full swing with excessive direct path leakage-current. Consequently, realization of multi-stage logic circuits becomes unrealistic. In this paper, we propose design of logic gates that do not suffer from these problems. As a proof of concept, we fabricated a 3-to-8 decoder with n-type only a-Si:H TFTs. Simulation and measurement results have demonstrated that the circuit could maintain unity stage-to-stage gain, while reduce more than 85% of static leakage current and 20% area when compared with other implementations.
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