N. Park, K. M. George, N. Park, M. Choi, Y. Kim, F. Lombardi
{"title":"分层测试中基于环境的soc特性","authors":"N. Park, K. M. George, N. Park, M. Choi, Y. Kim, F. Lombardi","doi":"10.1109/IMTC.2003.1208175","DOIUrl":null,"url":null,"abstract":"A B Thispaperproposes II noref environmat&bmed mefhod for evaluating thegoodyield m e (CYR) of Systems-on-Chip (SoC) during fabrication Testing nndyield evoluotion at high confidence are MM of the most critical irsues for the fechnologifal SUECCSS of Soc. Since 4 SoC is designed and assembled using deeply embedded InteUecfuol Propem (IP) cores om SoC a rapidly expanding market with great potential","PeriodicalId":135321,"journal":{"name":"Proceedings of the 20th IEEE Instrumentation Technology Conference (Cat. No.03CH37412)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2003-05-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Environmental based characterization of soc for stratified testing\",\"authors\":\"N. Park, K. M. George, N. Park, M. Choi, Y. Kim, F. Lombardi\",\"doi\":\"10.1109/IMTC.2003.1208175\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A B Thispaperproposes II noref environmat&bmed mefhod for evaluating thegoodyield m e (CYR) of Systems-on-Chip (SoC) during fabrication Testing nndyield evoluotion at high confidence are MM of the most critical irsues for the fechnologifal SUECCSS of Soc. Since 4 SoC is designed and assembled using deeply embedded InteUecfuol Propem (IP) cores om SoC a rapidly expanding market with great potential\",\"PeriodicalId\":135321,\"journal\":{\"name\":\"Proceedings of the 20th IEEE Instrumentation Technology Conference (Cat. No.03CH37412)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2003-05-20\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the 20th IEEE Instrumentation Technology Conference (Cat. No.03CH37412)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IMTC.2003.1208175\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 20th IEEE Instrumentation Technology Conference (Cat. No.03CH37412)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IMTC.2003.1208175","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Environmental based characterization of soc for stratified testing
A B Thispaperproposes II noref environmat&bmed mefhod for evaluating thegoodyield m e (CYR) of Systems-on-Chip (SoC) during fabrication Testing nndyield evoluotion at high confidence are MM of the most critical irsues for the fechnologifal SUECCSS of Soc. Since 4 SoC is designed and assembled using deeply embedded InteUecfuol Propem (IP) cores om SoC a rapidly expanding market with great potential