{"title":"采用综合、仿真和硬件仿真的方法对流水线RISC计算机系统进行原型设计","authors":"J. O. Hamblen","doi":"10.1109/MSE.1997.612580","DOIUrl":null,"url":null,"abstract":"This paper describes a VHDL based rapid prototyping approach to simulate, synthesize, and implement a prototype computer system using commercial CAD tools, a meta assembler, a retargetable C compiler, and FPGAs in a hardware emulator. This methodology is utilized in a senior design laboratory sequence of two required courses for computer engineering students at Georgia Tech.","PeriodicalId":120048,"journal":{"name":"Proceedings of International Conference on Microelectronic Systems Education","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"1997-07-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"Using synthesis, simulation, and hardware emulation to prototype a pipelined RISC computer system\",\"authors\":\"J. O. Hamblen\",\"doi\":\"10.1109/MSE.1997.612580\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper describes a VHDL based rapid prototyping approach to simulate, synthesize, and implement a prototype computer system using commercial CAD tools, a meta assembler, a retargetable C compiler, and FPGAs in a hardware emulator. This methodology is utilized in a senior design laboratory sequence of two required courses for computer engineering students at Georgia Tech.\",\"PeriodicalId\":120048,\"journal\":{\"name\":\"Proceedings of International Conference on Microelectronic Systems Education\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1997-07-21\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of International Conference on Microelectronic Systems Education\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/MSE.1997.612580\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of International Conference on Microelectronic Systems Education","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MSE.1997.612580","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Using synthesis, simulation, and hardware emulation to prototype a pipelined RISC computer system
This paper describes a VHDL based rapid prototyping approach to simulate, synthesize, and implement a prototype computer system using commercial CAD tools, a meta assembler, a retargetable C compiler, and FPGAs in a hardware emulator. This methodology is utilized in a senior design laboratory sequence of two required courses for computer engineering students at Georgia Tech.
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