{"title":"一种基于65nm CMOS的DC-9.5GHz消噪分布式LNA","authors":"Jianxun Zhu, H. Krishnaswamy, P. Kinget","doi":"10.1109/RFIC.2013.6569554","DOIUrl":null,"url":null,"abstract":"Summary form only given. A low noise amplifier is presented that uniquely achieves wide-band input matching and good low-frequency noise performance at the same time. Its topology is a hybrid of distributed amplifier and a common-source common-gate noise-canceling amplifier. The proof-of-principle prototype in 65nm CMOS operates from DC up to 9.5GHz with more than 12dB gain, achieves a minimum noise figure of 2.8dB, P1dB of -7dBm, IIP3 of +4dBm, consumes 18mW from a 1.4V power supply and occupies a total active area of 0.4mm2.","PeriodicalId":203521,"journal":{"name":"2013 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"48 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-06-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"11","resultStr":"{\"title\":\"A DC-9.5GHz noise-canceling distributed LNA in 65nm CMOS\",\"authors\":\"Jianxun Zhu, H. Krishnaswamy, P. Kinget\",\"doi\":\"10.1109/RFIC.2013.6569554\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Summary form only given. A low noise amplifier is presented that uniquely achieves wide-band input matching and good low-frequency noise performance at the same time. Its topology is a hybrid of distributed amplifier and a common-source common-gate noise-canceling amplifier. The proof-of-principle prototype in 65nm CMOS operates from DC up to 9.5GHz with more than 12dB gain, achieves a minimum noise figure of 2.8dB, P1dB of -7dBm, IIP3 of +4dBm, consumes 18mW from a 1.4V power supply and occupies a total active area of 0.4mm2.\",\"PeriodicalId\":203521,\"journal\":{\"name\":\"2013 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)\",\"volume\":\"48 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2013-06-02\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"11\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2013 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/RFIC.2013.6569554\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIC.2013.6569554","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A DC-9.5GHz noise-canceling distributed LNA in 65nm CMOS
Summary form only given. A low noise amplifier is presented that uniquely achieves wide-band input matching and good low-frequency noise performance at the same time. Its topology is a hybrid of distributed amplifier and a common-source common-gate noise-canceling amplifier. The proof-of-principle prototype in 65nm CMOS operates from DC up to 9.5GHz with more than 12dB gain, achieves a minimum noise figure of 2.8dB, P1dB of -7dBm, IIP3 of +4dBm, consumes 18mW from a 1.4V power supply and occupies a total active area of 0.4mm2.
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