数字系统设计质量的客观度量

D. Protheroe, F. Pessolano
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引用次数: 5

摘要

本文提出了一种定义数字系统质量的方法,根据规格的可测量参数和随后的设计实现。最初,软件质量度量与它们在硬件描述语言中的应用一起被审查。然后讨论与电路实现相关的度量,如设备和测试成本、可靠性等。然后提出并评估了一系列VHDL规格和由逻辑合成产生的电路的度量。初步结果表明,规格和电路度量之间有很强的相关性,因此它们的比值可以用作设计质量的度量。提出了进一步的工作,以便在更多的例子上验证该度量。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
An objective measure of digital system design quality
This paper proposes a method for defining the quality of a digital system in terms of measurable parameters of both the specification and a subsequent implementation of the design. Initially, software quality metrics are reviewed together with their application to hardware description languages. Metrics relating to circuit implementations are then discussed, such as device and testing costs, reliability, etc. A set of metrics are then proposed and evaluated for a range of VHDL specifications and the circuits resulting from logic synthesis. Initial results indicate that there is a strong correlation between specification and circuit metrics, so that their ratio may be used as a measure of design quality. Further work is proposed in order to validate the measure over a larger number of examples.
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