Compressed Sensing MRI Reconstruction on Intel HARPv2

Implementing the Iterative Soft-Thresholding Algorithm (ISTA) of compressed sensing for MRI image reconstruction is a good candidate for designing accelerators because real-time functional MRI applications require intensive computations. A straightforward mapping of the computation graph of ISTA onto an FPGA, with a wide enough datapath to saturate memory bandwidth, would require substantial resources, such that a modest size FPGA would not fit the reconstruction pipeline for an entire MRI image. This paper proposes several methods to design the kernel components of ISTA, such as matrix transpose, datapath reuse, parallelism within maps, and data buffering to overcome the problem. Our implementation with Intel OpenCL SDK and performance evaluation on Intel HARPv2 show that our methods can map the reconstruction for the entire 256x256 MRI image with 8 or more channels to its FPGA, while achieving good overall performance.