{"title":"一种用于ZVS DC-DC变换器的新型嵌入式电感","authors":"Xiangming Fang, Rongxiang Wu, Lulu Peng, J. Sin","doi":"10.1109/ISPSD.2012.6229021","DOIUrl":null,"url":null,"abstract":"In this paper, a new tapered silicon-embedded coreless power inductor is proposed and demonstrated. The width and depth for the different turns of the inductor are designed with different values to reduce the proximity effect. An 18.6 nH inductance and a peak Q factor of 12.1 are achieved at 23 MHz within a chip area of 0.8 mm2. The AC power loss of the inductor is reduced by a maximum of 56% using the novel design. The inductor shows a peak efficiency of 91% in ZVS conversion applications, and is the highest in monolithic ZVS DC-DC converters reported so far.","PeriodicalId":371298,"journal":{"name":"2012 24th International Symposium on Power Semiconductor Devices and ICs","volume":"51 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":"{\"title\":\"A new embedded inductor for ZVS DC-DC converter applications\",\"authors\":\"Xiangming Fang, Rongxiang Wu, Lulu Peng, J. Sin\",\"doi\":\"10.1109/ISPSD.2012.6229021\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, a new tapered silicon-embedded coreless power inductor is proposed and demonstrated. The width and depth for the different turns of the inductor are designed with different values to reduce the proximity effect. An 18.6 nH inductance and a peak Q factor of 12.1 are achieved at 23 MHz within a chip area of 0.8 mm2. The AC power loss of the inductor is reduced by a maximum of 56% using the novel design. The inductor shows a peak efficiency of 91% in ZVS conversion applications, and is the highest in monolithic ZVS DC-DC converters reported so far.\",\"PeriodicalId\":371298,\"journal\":{\"name\":\"2012 24th International Symposium on Power Semiconductor Devices and ICs\",\"volume\":\"51 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-06-03\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"9\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2012 24th International Symposium on Power Semiconductor Devices and ICs\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISPSD.2012.6229021\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 24th International Symposium on Power Semiconductor Devices and ICs","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISPSD.2012.6229021","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A new embedded inductor for ZVS DC-DC converter applications
In this paper, a new tapered silicon-embedded coreless power inductor is proposed and demonstrated. The width and depth for the different turns of the inductor are designed with different values to reduce the proximity effect. An 18.6 nH inductance and a peak Q factor of 12.1 are achieved at 23 MHz within a chip area of 0.8 mm2. The AC power loss of the inductor is reduced by a maximum of 56% using the novel design. The inductor shows a peak efficiency of 91% in ZVS conversion applications, and is the highest in monolithic ZVS DC-DC converters reported so far.
求助内容：
应助结果提醒方式：
京公网安备 11010802042870号
