多值逻辑电路用ingaas多结表面隧道晶体管的研制

Proceedings. 1998 28th IEEE International Symposium on Multiple- Valued Logic (Cat. No.98CB36138) Pub Date : 1998-05-27 DOI:10.1109/ISMVL.1998.679267

T. Baba, T. Uemura

{"title":"多值逻辑电路用ingaas多结表面隧道晶体管的研制","authors":"T. Baba, T. Uemura","doi":"10.1109/ISMVL.1998.679267","DOIUrl":null,"url":null,"abstract":"Multiple negative-differential-resistance (NDR) characteristics (up to six NDRs) are demonstrated by fabricating multiple-junction surface tunnel transistors (MJ-STTs) using an InGaAs material system. The tunneling current density is 500 times larger than that for a GaAs-based MJ-STT as well as higher peak-to-valley ratios (about 5). As an application of MJ-STTs for binary and multiple-valued logic, a programmable NAND/NOR logic circuit and a three-valued inverter circuit are implemented monolithically. Proper circuit operations of these circuits are confirmed using an oscillatory supply voltage.","PeriodicalId":377860,"journal":{"name":"Proceedings. 1998 28th IEEE International Symposium on Multiple- Valued Logic (Cat. No.98CB36138)","volume":"63 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1998-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"12","resultStr":"{\"title\":\"Development of InGaAs-based multiple-junction surface tunnel transistors for multiple-valued logic circuits\",\"authors\":\"T. Baba, T. Uemura\",\"doi\":\"10.1109/ISMVL.1998.679267\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Multiple negative-differential-resistance (NDR) characteristics (up to six NDRs) are demonstrated by fabricating multiple-junction surface tunnel transistors (MJ-STTs) using an InGaAs material system. The tunneling current density is 500 times larger than that for a GaAs-based MJ-STT as well as higher peak-to-valley ratios (about 5). As an application of MJ-STTs for binary and multiple-valued logic, a programmable NAND/NOR logic circuit and a three-valued inverter circuit are implemented monolithically. Proper circuit operations of these circuits are confirmed using an oscillatory supply voltage.\",\"PeriodicalId\":377860,\"journal\":{\"name\":\"Proceedings. 1998 28th IEEE International Symposium on Multiple- Valued Logic (Cat. No.98CB36138)\",\"volume\":\"63 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1998-05-27\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"12\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings. 1998 28th IEEE International Symposium on Multiple- Valued Logic (Cat. No.98CB36138)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISMVL.1998.679267\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. 1998 28th IEEE International Symposium on Multiple- Valued Logic (Cat. No.98CB36138)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISMVL.1998.679267","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 12

摘要

利用InGaAs材料体系制备了多结表面隧道晶体管(mj - stt)，证明了其多重负微分电阻(NDR)特性(最多可达6个NDR)。隧道电流密度比基于砷化镓的MJ-STT大500倍，并且峰谷比更高(约5)。作为MJ-STT在二进制和多值逻辑中的应用，可编程NAND/NOR逻辑电路和三值逆变电路被单片实现。使用振荡电源电压确认这些电路的正确电路操作。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文本刊更多论文

Development of InGaAs-based multiple-junction surface tunnel transistors for multiple-valued logic circuits

Multiple negative-differential-resistance (NDR) characteristics (up to six NDRs) are demonstrated by fabricating multiple-junction surface tunnel transistors (MJ-STTs) using an InGaAs material system. The tunneling current density is 500 times larger than that for a GaAs-based MJ-STT as well as higher peak-to-valley ratios (about 5). As an application of MJ-STTs for binary and multiple-valued logic, a programmable NAND/NOR logic circuit and a three-valued inverter circuit are implemented monolithically. Proper circuit operations of these circuits are confirmed using an oscillatory supply voltage.

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

Proceedings. 1998 28th IEEE International Symposium on Multiple- Valued Logic (Cat. No.98CB36138)

自引率

0.00%

发文量