{"title":"MPC505 RISC微控制器","authors":"C. Melear","doi":"10.1109/NORTHC.1994.643321","DOIUrl":null,"url":null,"abstract":"The MPC505 microcontroller is the first implementation of a new family of microcontrollers that features a reduced instruction set (RISC) architecture based on the PowerPC architecture. The internal architecture of the MPC505 implements a 32-bit structure. This architecture provides 32-bit effective addresses, integer data types of 8-, 16-, and 32-bits and floating point data types of 32 and 64 bits. A simplified block diagram of the MPC505 is shown. The MPC505 is designed to operate at 3.3 volts. Along with power conservation features, such as clock speed reduction, the MPC505 can operate on a relatively modest power budget.","PeriodicalId":218454,"journal":{"name":"Proceedings of NORTHCON '94","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"1994-10-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"The MPC505 RISC microcontroller\",\"authors\":\"C. Melear\",\"doi\":\"10.1109/NORTHC.1994.643321\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The MPC505 microcontroller is the first implementation of a new family of microcontrollers that features a reduced instruction set (RISC) architecture based on the PowerPC architecture. The internal architecture of the MPC505 implements a 32-bit structure. This architecture provides 32-bit effective addresses, integer data types of 8-, 16-, and 32-bits and floating point data types of 32 and 64 bits. A simplified block diagram of the MPC505 is shown. The MPC505 is designed to operate at 3.3 volts. Along with power conservation features, such as clock speed reduction, the MPC505 can operate on a relatively modest power budget.\",\"PeriodicalId\":218454,\"journal\":{\"name\":\"Proceedings of NORTHCON '94\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1994-10-11\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of NORTHCON '94\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/NORTHC.1994.643321\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of NORTHCON '94","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NORTHC.1994.643321","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
The MPC505 microcontroller is the first implementation of a new family of microcontrollers that features a reduced instruction set (RISC) architecture based on the PowerPC architecture. The internal architecture of the MPC505 implements a 32-bit structure. This architecture provides 32-bit effective addresses, integer data types of 8-, 16-, and 32-bits and floating point data types of 32 and 64 bits. A simplified block diagram of the MPC505 is shown. The MPC505 is designed to operate at 3.3 volts. Along with power conservation features, such as clock speed reduction, the MPC505 can operate on a relatively modest power budget.
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