在三个引脚上运行扫描测试:是的,我们可以!

Jocelyn Moreau, Thomas Droniou, P. Lebourg, Paul Armagnat
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引用次数: 20

摘要

如今,成像仪是非常小的物体,它们的尺寸总是在缩小,并且在它们的包装上只有三个标准的数字引脚是最常见的事情。回首2006年,仅仅在三年前,当人们要求在如此复杂的设备上进行工业结构测试的解决方案时,人们只能回答“不可能”或“自己做”。意法半导体也没有逃脱这一规则。为了解决这个问题,先后启动了内部开发和合作开发。本文将从测试成本的提高、硅的面积开销、设计流程的更新和工业化进程等方面,探讨这些发展的原因和方式,以及在此期间取得的良好成果。让所有设计的传感器都装备起来,并测试数据量(和时间)在25倍到30倍的范围内,只花了三年的时间。现在,该解决方案已在工业上可用,现在也是时候分享和展望三引脚工业扫描测试的未来…
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Running scan test on three pins: yes we can!
Imagers are pretty little objects nowadays, their size is always shrinking and having only three standard digital pins available on their package is a most common thing. Looking back in 2006, only three years ago, people asked for a solution to run industrial structural test on such complex devices could though only reply “impossible” or “Do It Yourself”. STMicroelectronics did not escape the rule. An internal development and a partnered development were thus successively launched to address this issue. This article proposes to examine all the why and how of these developments along with the good results obtained during that time, in terms of test cost improvement, area overhead in silicon, design flow updates and industrialization process. Getting all sensors designed today equipped and test data volume (and time) improvements in the range of 25X to 30X just took that three years time. Now that the solution is industrially available, it's also time to share and look at the future of industrial scan test on three pins…
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