A. Bandyopadhyay, R. Adams, K. Nguyen, P. Baginski, David Lamb, Thomas Tansley
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A 97.3 dB SNR, 600 kHz BW, 31mW multibit continuous time ΔΣ ADC
A continuous time 5-bit feed forward ΔΣ ADC architecture is presented, which measures 97.3 dB SNR, over 600 kHz bandwidth while consuming 31 mW/channel. This performance is achieved by using an ISI mitigation scheme and a 2nd-order DEM for 3-level DACs along with analog low power techniques. The 0.99mm2/channel chip was fabricated in 0.18um CMOS process, and achieves a FOM of 171.8 dB.
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