设计辅助技术对RRAM宏的性能和可靠性的好处

2023 IEEE International Memory Workshop (IMW) Pub Date : 2023-05-01 DOI:10.1109/IMW56887.2023.10145984

B. Giraud, S. Ricavy, Yasser Moursy, C. Laffond, I. Sever, V. Gherman, M. Pezzin, F. Lepin, M. Diallo, K. Zenati, S. Dumas, M. Vershkov, A. Bricalli, G. Piccolboni, J. Noël, A. Samir, G. Pillonnet, Y. Thonnart, G. Molas

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引用次数: 2

摘要

本文介绍了不同的设计辅助技术，并论证了它们对提高RRAM固有性能的影响。我们表明，写前读、电流限制和写终止技术在写过程中分别降低了-47%、-56%和-13%的功耗。结合写验证和纠错码，总体节能87%，访问时间-55%。基于代表性的RRAM宏(130nm CMOS)，统计(128kb)和续航(1M周期)特性，该工作通过突出设计技术协同优化的贡献，有助于加速RRAM的工业应用。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Benefits of Design Assist Techniques on Performances and Reliability of a RRAM Macro

This paper presents different design assist techniques and demonstrates their impact on enhancing the intrinsic RRAM performance. We show that the read-beforewrite, current-limitation and write-termination techniques reduce by -47%, -56% and-13% the power consumption during the writing process, respectively. Combined with write verification and error correction code, the overall improvements are 87% in energy saving and -55% on access time. Based on representative RRAM macro (130nm CMOS), statistic (128kb) and endurance (1M cycles) characterizations, this works contributes to accelerate RRAM industrial adoption by highlighting the design-technology co-optimization contribution.

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2023 IEEE International Memory Workshop (IMW)

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