{"title":"用于自动检测的矩不变量的VLSI实现","authors":"G. A. Armstrong, M. L. Simpson, D. Bouldin","doi":"10.1109/SSST.1990.138197","DOIUrl":null,"url":null,"abstract":"The design of a VLSI ASIC (application-specific integrated circuit) for use in automated inspection is described. The inspection scheme uses M.K. Hu's (1962) and S. Maitra's (1979) algorithms for moment invariants. A prototype design that resolved the long delay time of the multiplier by custom designing adder cells based on the Manchester carry chain was generated. The prototype ASIC is currently being fabricated in 2.0- mu m CMOS technology and has been simulated at 20 MHz. The final ASICs will be used in parallel at the board level to achieve the 230 MOPS necessary to perform moment-invariant algorithms in real time on 512*512 pixel images with 256 gray scales.<<ETX>>","PeriodicalId":201543,"journal":{"name":"[1990] Proceedings. The Twenty-Second Southeastern Symposium on System Theory","volume":"5 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1990-03-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"VLSI implementation of moment invariants for automated inspection\",\"authors\":\"G. A. Armstrong, M. L. Simpson, D. Bouldin\",\"doi\":\"10.1109/SSST.1990.138197\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The design of a VLSI ASIC (application-specific integrated circuit) for use in automated inspection is described. The inspection scheme uses M.K. Hu's (1962) and S. Maitra's (1979) algorithms for moment invariants. A prototype design that resolved the long delay time of the multiplier by custom designing adder cells based on the Manchester carry chain was generated. The prototype ASIC is currently being fabricated in 2.0- mu m CMOS technology and has been simulated at 20 MHz. The final ASICs will be used in parallel at the board level to achieve the 230 MOPS necessary to perform moment-invariant algorithms in real time on 512*512 pixel images with 256 gray scales.<<ETX>>\",\"PeriodicalId\":201543,\"journal\":{\"name\":\"[1990] Proceedings. The Twenty-Second Southeastern Symposium on System Theory\",\"volume\":\"5 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1990-03-11\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"[1990] Proceedings. The Twenty-Second Southeastern Symposium on System Theory\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SSST.1990.138197\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"[1990] Proceedings. The Twenty-Second Southeastern Symposium on System Theory","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SSST.1990.138197","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
摘要
描述了用于自动检测的VLSI专用集成电路的设计。检查方案使用M.K. Hu(1962)和S. Maitra(1979)的矩不变量算法。提出了一种基于曼彻斯特进位链的加法器单元自定义设计的原型设计,解决了乘法器延迟时间长的问题。原型ASIC目前正在2.0 μ m CMOS技术中制造,并已在20mhz下进行了模拟。最终的asic将在板级并行使用,以实现在具有256个灰度的512*512像素图像上实时执行矩不变算法所需的230 MOPS
VLSI implementation of moment invariants for automated inspection
The design of a VLSI ASIC (application-specific integrated circuit) for use in automated inspection is described. The inspection scheme uses M.K. Hu's (1962) and S. Maitra's (1979) algorithms for moment invariants. A prototype design that resolved the long delay time of the multiplier by custom designing adder cells based on the Manchester carry chain was generated. The prototype ASIC is currently being fabricated in 2.0- mu m CMOS technology and has been simulated at 20 MHz. The final ASICs will be used in parallel at the board level to achieve the 230 MOPS necessary to perform moment-invariant algorithms in real time on 512*512 pixel images with 256 gray scales.<>