{"title":"现代DSP架构下语音编码算法的多级优化","authors":"M. Awan, S. Masud, N. Khan, F. Abdullah","doi":"10.1109/PACRIM.2005.1517276","DOIUrl":null,"url":null,"abstract":"Real-time implementation of speech coding algorithm requires the DSP code to be highly optimized and the underlying hardware to be fast. This paper presents the results obtained from multi-level optimization of ITU-T G.729A low complexity speech codec on an embedded DSP platform. The implementation platform used in this work is based on analog devices Blackfin BF533 fixed-point media processor. Several high-level and low-level optimization techniques have been concurrently employed in this work to improve the run-time performance of the codec. Improvement in performance has been evaluated through the reduction in MIPS count for each optimization step. Results show that over twenty full-duplex channels of G.729A can be supported on this DSP platform in real-time.","PeriodicalId":346880,"journal":{"name":"PACRIM. 2005 IEEE Pacific Rim Conference on Communications, Computers and signal Processing, 2005.","volume":"267 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-10-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"Multilevel optimization of speech coding algorithms for modern DSP architectures\",\"authors\":\"M. Awan, S. Masud, N. Khan, F. Abdullah\",\"doi\":\"10.1109/PACRIM.2005.1517276\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Real-time implementation of speech coding algorithm requires the DSP code to be highly optimized and the underlying hardware to be fast. This paper presents the results obtained from multi-level optimization of ITU-T G.729A low complexity speech codec on an embedded DSP platform. The implementation platform used in this work is based on analog devices Blackfin BF533 fixed-point media processor. Several high-level and low-level optimization techniques have been concurrently employed in this work to improve the run-time performance of the codec. Improvement in performance has been evaluated through the reduction in MIPS count for each optimization step. Results show that over twenty full-duplex channels of G.729A can be supported on this DSP platform in real-time.\",\"PeriodicalId\":346880,\"journal\":{\"name\":\"PACRIM. 2005 IEEE Pacific Rim Conference on Communications, Computers and signal Processing, 2005.\",\"volume\":\"267 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2005-10-17\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"PACRIM. 2005 IEEE Pacific Rim Conference on Communications, Computers and signal Processing, 2005.\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/PACRIM.2005.1517276\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"PACRIM. 2005 IEEE Pacific Rim Conference on Communications, Computers and signal Processing, 2005.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/PACRIM.2005.1517276","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Multilevel optimization of speech coding algorithms for modern DSP architectures
Real-time implementation of speech coding algorithm requires the DSP code to be highly optimized and the underlying hardware to be fast. This paper presents the results obtained from multi-level optimization of ITU-T G.729A low complexity speech codec on an embedded DSP platform. The implementation platform used in this work is based on analog devices Blackfin BF533 fixed-point media processor. Several high-level and low-level optimization techniques have been concurrently employed in this work to improve the run-time performance of the codec. Improvement in performance has been evaluated through the reduction in MIPS count for each optimization step. Results show that over twenty full-duplex channels of G.729A can be supported on this DSP platform in real-time.