{"title":"一种SAR逻辑，用于在SAR ADC中进行无故障操作的电流导向DAC","authors":"G. Panov, A. Popov","doi":"10.1109/ET.2018.8549592","DOIUrl":null,"url":null,"abstract":"A novel method is proposed to avoid glitches, when a current-steering DAC in a SAR ADC switches. This is achieved by using a new algorithm in the control logic. The results of circuit simulations on transistor level schematic example confirm the operation of the presented approach.","PeriodicalId":374877,"journal":{"name":"2018 IEEE XXVII International Scientific Conference Electronics - ET","volume":"53 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"A SAR logic for glitch-less operation of a currentsteering DAC in a SAR ADC\",\"authors\":\"G. Panov, A. Popov\",\"doi\":\"10.1109/ET.2018.8549592\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A novel method is proposed to avoid glitches, when a current-steering DAC in a SAR ADC switches. This is achieved by using a new algorithm in the control logic. The results of circuit simulations on transistor level schematic example confirm the operation of the presented approach.\",\"PeriodicalId\":374877,\"journal\":{\"name\":\"2018 IEEE XXVII International Scientific Conference Electronics - ET\",\"volume\":\"53 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2018 IEEE XXVII International Scientific Conference Electronics - ET\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ET.2018.8549592\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 IEEE XXVII International Scientific Conference Electronics - ET","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ET.2018.8549592","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A SAR logic for glitch-less operation of a currentsteering DAC in a SAR ADC
A novel method is proposed to avoid glitches, when a current-steering DAC in a SAR ADC switches. This is achieved by using a new algorithm in the control logic. The results of circuit simulations on transistor level schematic example confirm the operation of the presented approach.
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