基于ram的Moore fsm硬件缩减

2014 7th International Conference on Human System Interactions (HSI) Pub Date : 2014-06-16 DOI:10.1109/HSI.2014.6860485

M. Kolopienczyk, A. Barkalov, L. Titarenko

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引用次数: 5

摘要

提出了一种利用FPGA芯片内嵌存储块实现Moore FSM逻辑电路的方法。该方法基于用附加变量替换逻辑条件集的某些部分。它导致用于替换逻辑条件的多路复用器中lut的数量减少。最后给出了该方法的应用实例。

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Hardware reduction for RAM-based Moore FSMs

A method is proposed allowing implementing logic circuit of Moore FSM with embedded memory block of FPGA chips. The method is based on replacement some part of the set of logical conditions by additional variables. It results in diminishing for the number of LUTs in the multiplexer used for replacement of logical conditions. An example of proposed design methods application is given.

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来源期刊

2014 7th International Conference on Human System Interactions (HSI)

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