采用全静态0.18-/spl mu/m CMOS逻辑的4Gb/s 1:16 DEMUX

Proceedings of the 12th IEEE International Conference on Fuzzy Systems (Cat. No.03CH37442) Pub Date : 1900-01-01 DOI:10.1109/ICM.2003.238426

Y. Abdalla, M. Elmasry

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引用次数: 2

摘要

本文介绍了一种基于0.18 /spl mu/m CMOS技术，仅采用静态CMOS逻辑的4Gb/s半速率1:16 DEMUX的设计。一种新的尺寸方法被用来最小化功耗。与最近公布的结果相比，功耗降低了几倍，延迟功率产品也降低了33%。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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A 4Gb/s 1:16 DEMUX using an all-static 0.18-/spl mu/m CMOS logic

This paper introduces a design for a 4Gb/s half rate 1:16 DEMUX based on 0.18 /spl mu/m CMOS technology using only static CMOS logic. A new sizing methodology is used to minimize the power consumption. The power consumption is reduced several times compared to recently published results with the delay power product also reduced by 33%.

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Proceedings of the 12th IEEE International Conference on Fuzzy Systems (Cat. No.03CH37442)

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