射频多鳍场效应管中的寄生最小化

Wen Wu, Zhikuan Zhang, M. Chan
{"title":"射频多鳍场效应管中的寄生最小化","authors":"Wen Wu, Zhikuan Zhang, M. Chan","doi":"10.1109/EDSSC.2005.1635272","DOIUrl":null,"url":null,"abstract":"This paper studies the minimization of parasitics in multi-fin MOS devices. A distributed RC model is provided to minimize the gate resistances and the influence of device geometrical parameters on gate RC delay is thoroughly investigated. Also, we give a criterion to achieve the minimal gate resistance for RF device design. Furthermore, methods of reducing source/drain parasitic resistances and capacitances are discussed.","PeriodicalId":429314,"journal":{"name":"2005 IEEE Conference on Electron Devices and Solid-State Circuits","volume":"2 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-12-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Parasitic Minimization in RF Multi-Fin FETs\",\"authors\":\"Wen Wu, Zhikuan Zhang, M. Chan\",\"doi\":\"10.1109/EDSSC.2005.1635272\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper studies the minimization of parasitics in multi-fin MOS devices. A distributed RC model is provided to minimize the gate resistances and the influence of device geometrical parameters on gate RC delay is thoroughly investigated. Also, we give a criterion to achieve the minimal gate resistance for RF device design. Furthermore, methods of reducing source/drain parasitic resistances and capacitances are discussed.\",\"PeriodicalId\":429314,\"journal\":{\"name\":\"2005 IEEE Conference on Electron Devices and Solid-State Circuits\",\"volume\":\"2 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2005-12-19\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2005 IEEE Conference on Electron Devices and Solid-State Circuits\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EDSSC.2005.1635272\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2005 IEEE Conference on Electron Devices and Solid-State Circuits","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EDSSC.2005.1635272","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2

摘要

本文研究了多鳍MOS器件中寄生效应的最小化问题。提出了一种最小化栅极电阻的分布式RC模型,并深入研究了器件几何参数对栅极RC延迟的影响。同时,给出了射频器件设计中栅极电阻最小的准则。此外,还讨论了降低源漏寄生电阻和寄生电容的方法。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Parasitic Minimization in RF Multi-Fin FETs
This paper studies the minimization of parasitics in multi-fin MOS devices. A distributed RC model is provided to minimize the gate resistances and the influence of device geometrical parameters on gate RC delay is thoroughly investigated. Also, we give a criterion to achieve the minimal gate resistance for RF device design. Furthermore, methods of reducing source/drain parasitic resistances and capacitances are discussed.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:604180095
Book学术官方微信