P.Emi Pushpam, J. Twinkle, Dr.Premanand V.Chandramani
{"title":"采用RZ DAC对三阶CT ΔΣ CRFB-FF结构调制器进行过量环路延迟补偿","authors":"P.Emi Pushpam, J. Twinkle, Dr.Premanand V.Chandramani","doi":"10.1109/ICPEDC47771.2019.9036709","DOIUrl":null,"url":null,"abstract":"Continuous-time Delta-Sigma Modulators (CT-DSM) suffer from one of the system-level non-idealities called an excess loop delay. This excess loop delay changes the NTF (Noise Transfer Function) and affects the stability of the modulator. Return-To-Zero DAC (RZ-DAC) solves this problem if the delay value is ranged between 0 and 0.5. Adding an additional path around the quantizer compensate the excess loop delay for the range 0.1 to 1. But this requires the delay value to be known before. A simple technique for compensating excess loop delay for any unknown delay values up-to 1 is suggested in this paper. The compensation technique uses RZ-DAC with an additional compensation loop with delay $\\mathrm{z}^{-1/2}$ and a simple modification around the quantizer. To verify the compensation technique the third order CT-DSM with CRFBFF structure has been chosen. The modulator achieves constant S(Q)NR of 87. 4dB with loop delay up-to 1 in the signal chain.","PeriodicalId":426923,"journal":{"name":"2019 2nd International Conference on Power and Embedded Drive Control (ICPEDC)","volume":"81 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Excess loop delay compensation using RZ DAC for the third order CT ΔΣ modulator with CRFB-FF structures\",\"authors\":\"P.Emi Pushpam, J. Twinkle, Dr.Premanand V.Chandramani\",\"doi\":\"10.1109/ICPEDC47771.2019.9036709\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Continuous-time Delta-Sigma Modulators (CT-DSM) suffer from one of the system-level non-idealities called an excess loop delay. This excess loop delay changes the NTF (Noise Transfer Function) and affects the stability of the modulator. Return-To-Zero DAC (RZ-DAC) solves this problem if the delay value is ranged between 0 and 0.5. Adding an additional path around the quantizer compensate the excess loop delay for the range 0.1 to 1. But this requires the delay value to be known before. A simple technique for compensating excess loop delay for any unknown delay values up-to 1 is suggested in this paper. The compensation technique uses RZ-DAC with an additional compensation loop with delay $\\\\mathrm{z}^{-1/2}$ and a simple modification around the quantizer. To verify the compensation technique the third order CT-DSM with CRFBFF structure has been chosen. The modulator achieves constant S(Q)NR of 87. 4dB with loop delay up-to 1 in the signal chain.\",\"PeriodicalId\":426923,\"journal\":{\"name\":\"2019 2nd International Conference on Power and Embedded Drive Control (ICPEDC)\",\"volume\":\"81 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-08-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2019 2nd International Conference on Power and Embedded Drive Control (ICPEDC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICPEDC47771.2019.9036709\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 2nd International Conference on Power and Embedded Drive Control (ICPEDC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICPEDC47771.2019.9036709","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Excess loop delay compensation using RZ DAC for the third order CT ΔΣ modulator with CRFB-FF structures
Continuous-time Delta-Sigma Modulators (CT-DSM) suffer from one of the system-level non-idealities called an excess loop delay. This excess loop delay changes the NTF (Noise Transfer Function) and affects the stability of the modulator. Return-To-Zero DAC (RZ-DAC) solves this problem if the delay value is ranged between 0 and 0.5. Adding an additional path around the quantizer compensate the excess loop delay for the range 0.1 to 1. But this requires the delay value to be known before. A simple technique for compensating excess loop delay for any unknown delay values up-to 1 is suggested in this paper. The compensation technique uses RZ-DAC with an additional compensation loop with delay $\mathrm{z}^{-1/2}$ and a simple modification around the quantizer. To verify the compensation technique the third order CT-DSM with CRFBFF structure has been chosen. The modulator achieves constant S(Q)NR of 87. 4dB with loop delay up-to 1 in the signal chain.