CMOS电桥故障建模与测试模式评估

Digest of Papers Eleventh Annual 1993 IEEE VLSI Test Symposium Pub Date : 1993-04-06 DOI:10.1109/VTEST.1993.313297

C. Di, J. Jess

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引用次数: 23

摘要

CMOS电桥故障具有非常复杂的特性，给测试带来了困难。本文提出了一种用故障布尔表达式对所有类型桥梁进行建模的新方法。采用简化的晶体管模型，对受影响的子电路进行了分析。实验表明，这种建模方法可以很好地权衡精度与效率，并且可以快速评估大型电路的测试模式

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On CMOS bridge fault modeling and test pattern evaluation

CMOS bridge faults have very complex behavior and make the testing difficult. This paper proposes a new technique to model all types of bridges as faulty boolean expressions. The modeling is based on analyzing the affected subcircuits using a simplified transistor model. Experiments show that this way of modeling is a good tradeoff of accuracy versus efficiency and allows fast evaluation of test patterns for large circuits.<>

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Digest of Papers Eleventh Annual 1993 IEEE VLSI Test Symposium

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