AES的二阶低随机d + 1硬件共享

S. Dhooghe, Aein Rezaei Shahmirzadi, A. Moradi
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引用次数: 2

摘要

在本文中,我们引入了使用最小共享数和1268位随机性的AES二阶掩码,包括明文和密钥的共享。s盒的屏蔽是基于字节反转的塔场分解,其中使用了改变保护技术来重新屏蔽分解的中间分支。s盒的共享是精心设计的,这样它就可以在不使用随机性的情况下实现一阶探测安全性,并且其输出的共享是一致的。多轮安全是通过重新屏蔽状态来实现的,我们使用基于探测信息传播的理论分析来减少每轮对新鲜随机性的需求。其结果是二阶掩码AES,在延迟和面积方面与最先进的AES竞争,但将随机性复杂性降低到以前已知工作的八倍以上。除了对我们的掩码设计进行相应的理论分析和安全性证明外,还在FPGA上实现了该设计并通过实验室分析进行了评估。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Second-Order Low-Randomness d + 1 Hardware Sharing of the AES
In this paper, we introduce a second-order masking of the AES using the minimal number of shares and a total of 1268 bits of randomness including the sharing of the plaintext and key. The masking of the S-box is based on the tower field decomposition of the inversion over bytes where the changing of the guards technique is used in order to re-mask the middle branch of the decomposition. The sharing of the S-box is carefully crafted such that it achieves first-order probing security without the use of randomness and such that the sharing of its output is uniform. Multi-round security is achieved by re-masking the state where we use a theoretical analysis based on the propagation of probed information to reduce the demand for fresh randomness per round. The result is a second-order masked AES which competes with the state-of-the-art in terms of latency and area, but reduces the randomness complexity over eight times over the previous known works. In addition to the corresponding theoretical analysis and proofs for the security of our masked design, it has been implemented on FPGA and evaluated via lab analysis.
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