几种SDRAM模块的片间功率噪声耦合分析

J. Wee, Seongsoo Lee, Yong-Ju Kim
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引用次数: 1

摘要

本文根据DDR SDRAM的封装和模块类型,阐述了芯片工作时的噪声特性。用TSOP封装和FBGA封装的SDRAM芯片分别在TSOP和FBGA封装的DIMM上进行阻抗分布和功率噪声分析。与一般概念不同的是,FBGA封装的噪声特性比TSOP封装的噪声特性更弱、更敏感。此外,仿真结果表明,模块的去耦电容位置比封装的引线电感对控制自身和传递噪声特性更重要。因此,通过配电系统的设计,不仅要考虑封装类型,还要考虑整个模块系统,才能达到满足噪声抑制和隔离的目标规格。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Analysis of chip-to-chip power noise coupling on several SDRAM modules
This paper illustrates the noise characteristics under chip's operations according to types of packages and modules for DDR SDRAM. The impedance profiles and power noises are analyzed with SDRAM chips having TSOP package and FBGA package on TSOP-based DIMM and FBGA-based DIMM. In controversy with common concepts, the noise characteristics of FBGA package are more weak and sensitive than those of the TSOP package. In addition, the simulated results show that the decoupling capacitor locations of modules are more important to control the self and transfer noise characteristics than the lead inductance of the packages. Therefore, satisfying the target spec of the noise suppression and isolation can be achieved through the design of power distribution systems only with considering not only the package types but also the whole module system.
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