小聚酰亚胺开孔尺寸对倒装铜柱封装接触电阻和可靠性的影响研究

Kuei Hsiao Kuo Frank, Shaun Xiao, Abram Hwang, Kui-Yu Chang, Jovi Chang, F. Chien
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摘要

本文讨论了小聚酰亚胺开口(PIO)尺寸对碰撞电性能、机械性能和封装可靠性的影响。在不同的PIO尺寸下,评估了碰撞金属(UBM)与铝衬垫(Al)之间的接触电阻(Rc);10μm、15μm、20μm、30μm、35μm。设计了四线开尔文测量用铝接I/O的Rc测试车,用于Rc数据采集。对不同PIO面积与UBM面积之比(2%~25%)下铜柱抗剪强度及破坏模式进行了分析。两种不同的再钝化材料,一种是高温固化PI(固化温度>350C),这是铜柱凹凸的主流;另一种是低温固化刚性(高模量)PI(固化温度<300℃),通常用于先进的晶圆厂节点进行比较。研究了小PIO尺寸对后续装配和可靠性的影响。测试车的封装尺寸为196 mm2,雏菊链模具尺寸为11 x 11 mm2。最小凹凸间距为140μm。UBM固定在35x65μm,适用于不同的PIO尺寸;10μm、10 × 20μm、20μm和15 × 25μm模拟典型凹凸设计要求。所有不同PIO尺寸的研究腿都被释放到组装中,并采用封装级热循环试验对其进行了评价。采用c型扫描声学显微镜(CSAM)、扫描电子显微镜(SEM)和每个PIO腿的截面对其装配和可靠性性能进行了研究。本研究的目的是了解小PIO尺寸对倒装封装中碰撞电气、机械和芯片封装相互作用的影响,以实现稳健的铜柱互连。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Study of Small Polyimide Open Size in Contact Resistance and Reliability For Flip Chip Cu Pillar Package
In this investigation, the effects of small polyimide open (PIO) size for bump electrical, mechanical and package reliability performances are discussed. The contact resistance (Rc) between under bump metal (UBM) and Aluminum pad (Al) is assessed with varied PIO size; 10μm, 15μm, 20μm, 30μm and 35μm. The Rc test vehicle with I/O connected by Al metal for 4- wire Kelvin measurement is designed for Rc data collection. The UBM size is fixed for different PIO size, copper post shear strength and failure modes for different ratio of PIO area to UBM area (2%~25%) are also analyzed. Two different re-passivation materials, one is high temperature cured PI (curing temperature>350C) which is the mainstream for Cu pillar bump; the other is low temperature cured stiffer (high modulus) PI (curing temperature<300 C) that is typically used for advanced fab node are selected for comparison.The effects of small PIO size in subsequent assembly and reliability are also studied. The package size of test vehicle is 196 mm2 with a daisy-chain die size of 11 x 11 mm2. The minimum bump pitch is 140μm. The UBM is fixed at 35x65μm for different PIO size; 10μm, 10x20μm, 20μm and 15x25μm to simulate typical bump design request. All the study legs of different PIO size were released to assembly and had been evaluated by employing package level thermal cycling test. The assembly and reliability performance were investigated by C-mode Scanning Acoustic Microscope (CSAM), Scanning Electron Microscope (SEM) and cross-section for each PIO leg.The study of this investigation is to know the effects of small PIO size to bump electrical, mechanical and chip package interaction to achieving robust Cu pillar interconnection in flip chip package.
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