基于40nm CMOS的28GHz高效同相动态阻抗补偿放大器

2021 IEEE International Workshop on Electromagnetics: Applications and Student Innovation Competition (iWEM) Pub Date : 2021-11-28 DOI:10.1109/iwem53379.2021.9790398

Yi Wu, Junyuan Tu, Junhong Liu, Guangyin Feng, Yanjie Wang

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引用次数: 1

摘要

本文设计了一种40nm CMOS工艺的28GHz高效同相功率放大器(PA)。提出了电容中和技术和动态阻抗元件对虚部阻抗进行补偿，大大提高了不同相位的功率效率。在共源驱动器中使用1V电源，在级联放大器中使用1.8V电源，当相位为35°时，放大器的模拟饱和输出功率为23dBm，功率附加效率(PAE)为47.4%。相位为20°时，6dB回退(PBO)时的PAE为21%。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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A 28GHz High-Efficiency Outphasing PA with Dynamic Impedance Compensation in 40nm CMOS

This paper describes the design of a 28GHz high-efficiency outphasing power amplifier (PA) in a 40nm CMOS process. A capacitance neutralization technique and a dynamic impedance component to compensate the imaginary part of the impedance are proposed, which greatly increase the power efficiency in different phases. Using 1V supply in a common-source driver and 1.8V supply in the cascode PA, the PA achieves a simulated saturated output power of 23dBm with 47.4% power-added efficiency(PAE ) when the phase is 35°. The PAE at 6dB back off (PBO) from saturation is 21% when the phase is 20°.

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2021 IEEE International Workshop on Electromagnetics: Applications and Student Innovation Competition (iWEM)

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