基于内存的SPAD ToF图像传感器并发检测器

2023 International Technical Conference on Circuits/Systems, Computers, and Communications (ITC-CSCC) Pub Date : 2023-06-25 DOI:10.1109/ITC-CSCC58803.2023.10212957

Jongha Park, Seong-ook Jung

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引用次数: 0

摘要

这项工作提出了一种基于区域高效存储器的飞行时间(ToF)图像传感器并发检测器(MCD)。所提出的MCD由四个10位寄存器、寄存器选择器和一个粗比特比较器组成。采用0.18 μm CMOS工艺实现了基于MCD的4 × 4像素单光子雪崩二极管(SPAD)直方图电路，其面积为970μm X 124 μm，比传统的基于4像素并发探测器(CD)的SPAD直方图电路减少了59%。与传统的基于4像素CD的SPAD直方图电路相比，峰值背景比和峰值计数率分别提高了X 0.13和X 2.4。

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A Memory Based Concurrence Detector for SPAD ToF Image Sensors

This work presents an area efficient memory based concurrence detector (MCD) for Time-of-flight (ToF) image sensors. The proposed MCD consists of four 10-bit registers, register selector and a coarse bit comparator. 4 × 4 pixel array of MCD based single-photon avalanche diode (SPAD) histogramming circuit is implemented in 0.18 μm CMOS process with an area of 970μm X 124 μm, 59% less area compared to the conventional 4-pixel concurrence detector(CD) based SPAD histogramming circuit. Peak to background ratio and peak count rate are improved by X 0.13 and X 2.4 respectively, compared to the conventional 4-pixel CD based SPAD histogramming circuit.

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来源期刊

2023 International Technical Conference on Circuits/Systems, Computers, and Communications (ITC-CSCC)

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