一种用于植入式神经接口的超低功耗像素

2023 9th International Workshop on Advances in Sensors and Interfaces (IWASI) Pub Date : 2023-06-08 DOI:10.1109/IWASI58316.2023.10164384

Timo Lausen, S. Keil, R. Thewes

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引用次数: 0

摘要

为测试一种新型神经传感放大器，设计了一种基于180nm CMOS技术的8 × 8阵列。后置仿真结果表明，在1Hz ~ 300Hz局部场电位带输入参考噪声为10.3 μVrms，在300Hz ~ 10kHz动作电位带输入参考噪声为19.8 μVrms。在3.3 V时，每像素所需的功率为165 nW或50nA。带宽为2kHz，全帧速率为10kHz。

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An Ultra Low Power Pixel for Implantable Neural Interfaces

The design of an 8 x 8 array in a 180 nm CMOS technology is presented for testing a new type of neural sensing amplifier. Post layout simulation results show an input refereed noise of 10.3 μVrms in the local field potential band from 1Hz to 300Hz and 19.8 μVrms in the action potential band from 300Hz to 10kHz. The required power per pixel is 165 nW or 50nA at 3.3 V. The bandwidth is 2kHz at a full frame rate of 10kHz.

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2023 9th International Workshop on Advances in Sensors and Interfaces (IWASI)

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