重新审视移位寄存器的实现，以方便测试的生成和测试

Digest of Papers Eleventh Annual 1993 IEEE VLSI Test Symposium Pub Date : 1993-04-06 DOI:10.1109/VTEST.1993.313333

S. Toida

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引用次数: 1

摘要

重新研究了顺序电路的移位寄存器实现。虽然移位寄存器的实现不需要额外的扫描电路，缩短了测试应用时间，但它通常需要许多存储元件。本文提出了一种在移位寄存器实现中减少内存元数的方法。

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Revisiting shift register realization for ease of test generation and testing

The shift register realization of sequential circuits is reexamined. Though the shift register realization requires no extra circuits for scan, and shortens test application time, it in general requires many memory elements. This paper presents a method to reduce the number of memory elements in a shift register realization.<>

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来源期刊

Digest of Papers Eleventh Annual 1993 IEEE VLSI Test Symposium

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