{"title":"任务约束与需求可变性的多体系结构容错方法","authors":"Beatrice Shokry, T. Refaat, H. Amer","doi":"10.1109/NILES53778.2021.9600514","DOIUrl":null,"url":null,"abstract":"This paper studies an FPGA-based system and shows how to switch (during runtime) between different architectures when the system is subjected to varying requirements (such as area, performance, reliability, fault security). A generic combinational module is at the center of this work. Several implementations of this combinational function must be available on chip or downloadable using Dynamic Partial Reconfiguration (DPR). A switching criterion is proposed to decide on the most suitable architecture at any point in time during system operation. Two designs are then proposed to enable the switching process. Parts of the design are implemented on Altera Cyclone IV FPGA.","PeriodicalId":249153,"journal":{"name":"2021 3rd Novel Intelligent and Leading Emerging Sciences Conference (NILES)","volume":"125 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-10-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Multi-Architecture Fault-Tolerant Approach for In-Mission Constraint & Requirement Variability\",\"authors\":\"Beatrice Shokry, T. Refaat, H. Amer\",\"doi\":\"10.1109/NILES53778.2021.9600514\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper studies an FPGA-based system and shows how to switch (during runtime) between different architectures when the system is subjected to varying requirements (such as area, performance, reliability, fault security). A generic combinational module is at the center of this work. Several implementations of this combinational function must be available on chip or downloadable using Dynamic Partial Reconfiguration (DPR). A switching criterion is proposed to decide on the most suitable architecture at any point in time during system operation. Two designs are then proposed to enable the switching process. Parts of the design are implemented on Altera Cyclone IV FPGA.\",\"PeriodicalId\":249153,\"journal\":{\"name\":\"2021 3rd Novel Intelligent and Leading Emerging Sciences Conference (NILES)\",\"volume\":\"125 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2021-10-23\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2021 3rd Novel Intelligent and Leading Emerging Sciences Conference (NILES)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/NILES53778.2021.9600514\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 3rd Novel Intelligent and Leading Emerging Sciences Conference (NILES)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NILES53778.2021.9600514","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
摘要
本文研究了一个基于fpga的系统,并展示了当系统受到不同需求(如面积、性能、可靠性、故障安全性)时如何在不同架构之间切换(在运行时)。泛型组合模块是这项工作的核心。这个组合功能的几个实现必须在芯片上可用,或者可以使用动态部分重新配置(DPR)下载。提出了一个切换准则,在系统运行的任何时间点决定最合适的体系结构。然后提出了两种设计来实现开关过程。部分设计在Altera Cyclone IV FPGA上实现。
Multi-Architecture Fault-Tolerant Approach for In-Mission Constraint & Requirement Variability
This paper studies an FPGA-based system and shows how to switch (during runtime) between different architectures when the system is subjected to varying requirements (such as area, performance, reliability, fault security). A generic combinational module is at the center of this work. Several implementations of this combinational function must be available on chip or downloadable using Dynamic Partial Reconfiguration (DPR). A switching criterion is proposed to decide on the most suitable architecture at any point in time during system operation. Two designs are then proposed to enable the switching process. Parts of the design are implemented on Altera Cyclone IV FPGA.