{"title":"时钟微架构的功能模型","authors":"C. Charlton, D. Jackson, P. Leng","doi":"10.1145/75362.75420","DOIUrl":null,"url":null,"abstract":"Models for the simulation of computer systems at the microarchitectural level are widely used to assist in design analysis and verification, and the development of microcode. The general model we describe here represents the behaviour of a clocked microarchitecture through the application of functions to component states and signal values. The operational semantics of the model are based partly on data flow and partly on graph reduction, allowing use to be made of the concept of 'lazy' evaluation to aid efficient simulation.","PeriodicalId":365456,"journal":{"name":"MICRO 22","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1989-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"A functional model of clocked microarchitectures\",\"authors\":\"C. Charlton, D. Jackson, P. Leng\",\"doi\":\"10.1145/75362.75420\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Models for the simulation of computer systems at the microarchitectural level are widely used to assist in design analysis and verification, and the development of microcode. The general model we describe here represents the behaviour of a clocked microarchitecture through the application of functions to component states and signal values. The operational semantics of the model are based partly on data flow and partly on graph reduction, allowing use to be made of the concept of 'lazy' evaluation to aid efficient simulation.\",\"PeriodicalId\":365456,\"journal\":{\"name\":\"MICRO 22\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1989-08-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"MICRO 22\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1145/75362.75420\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"MICRO 22","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/75362.75420","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Models for the simulation of computer systems at the microarchitectural level are widely used to assist in design analysis and verification, and the development of microcode. The general model we describe here represents the behaviour of a clocked microarchitecture through the application of functions to component states and signal values. The operational semantics of the model are based partly on data flow and partly on graph reduction, allowing use to be made of the concept of 'lazy' evaluation to aid efficient simulation.
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