{"title":"使用70 MHz的CY7C44X和CY7C45X fifo","authors":"B.G. Wenniger","doi":"10.1109/ELECTR.1991.718191","DOIUrl":null,"url":null,"abstract":"This paper describes how to interface to the 'third generation FlF0s;\" the clocked FIFOs, in order to achieve reliable operation at 70 MHz. A brief history of integrated circuit FlFOs is presented, followed by a discussion of the advantages and disadvantages of each. The features of the Cypress clocked FIFOs are described and their benefits to the designers of high performance systems are explained. A design is presented that illustrates how to achieve maximum performance.","PeriodicalId":339281,"journal":{"name":"Electro International, 1991","volume":"48 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1991-04-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Using the CY7C44X and CY7C45X FIFOs at 70 MHz\",\"authors\":\"B.G. Wenniger\",\"doi\":\"10.1109/ELECTR.1991.718191\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper describes how to interface to the 'third generation FlF0s;\\\" the clocked FIFOs, in order to achieve reliable operation at 70 MHz. A brief history of integrated circuit FlFOs is presented, followed by a discussion of the advantages and disadvantages of each. The features of the Cypress clocked FIFOs are described and their benefits to the designers of high performance systems are explained. A design is presented that illustrates how to achieve maximum performance.\",\"PeriodicalId\":339281,\"journal\":{\"name\":\"Electro International, 1991\",\"volume\":\"48 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1991-04-16\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Electro International, 1991\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ELECTR.1991.718191\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Electro International, 1991","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ELECTR.1991.718191","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
This paper describes how to interface to the 'third generation FlF0s;" the clocked FIFOs, in order to achieve reliable operation at 70 MHz. A brief history of integrated circuit FlFOs is presented, followed by a discussion of the advantages and disadvantages of each. The features of the Cypress clocked FIFOs are described and their benefits to the designers of high performance systems are explained. A design is presented that illustrates how to achieve maximum performance.