{"title":"使用可编程门阵列的伺服控制器的DSP外设","authors":"A. H. Overmars","doi":"10.1109/PEDS.1995.404957","DOIUrl":null,"url":null,"abstract":"Two peripherals for digital signal processor (DSP) based servomotor controllers implemented using programmable gate arrays (PGA) are presented. The first is a 32 bit quadrature decoder capable of an input bandwidth of 40 MHz and outputs its counter results as signed integers. The second is an 11 bit amplifier (10 bits plus sign) with an update rate of 80 kHz, which also accepts signed integers.<<ETX>>","PeriodicalId":244042,"journal":{"name":"Proceedings of 1995 International Conference on Power Electronics and Drive Systems. PEDS 95","volume":"67 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1995-02-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"DSP peripherals for servo controllers using programmable gate arrays\",\"authors\":\"A. H. Overmars\",\"doi\":\"10.1109/PEDS.1995.404957\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Two peripherals for digital signal processor (DSP) based servomotor controllers implemented using programmable gate arrays (PGA) are presented. The first is a 32 bit quadrature decoder capable of an input bandwidth of 40 MHz and outputs its counter results as signed integers. The second is an 11 bit amplifier (10 bits plus sign) with an update rate of 80 kHz, which also accepts signed integers.<<ETX>>\",\"PeriodicalId\":244042,\"journal\":{\"name\":\"Proceedings of 1995 International Conference on Power Electronics and Drive Systems. PEDS 95\",\"volume\":\"67 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1995-02-21\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of 1995 International Conference on Power Electronics and Drive Systems. PEDS 95\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/PEDS.1995.404957\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of 1995 International Conference on Power Electronics and Drive Systems. PEDS 95","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/PEDS.1995.404957","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
DSP peripherals for servo controllers using programmable gate arrays
Two peripherals for digital signal processor (DSP) based servomotor controllers implemented using programmable gate arrays (PGA) are presented. The first is a 32 bit quadrature decoder capable of an input bandwidth of 40 MHz and outputs its counter results as signed integers. The second is an 11 bit amplifier (10 bits plus sign) with an update rate of 80 kHz, which also accepts signed integers.<>