可靠的高速缓存和控制存储器设计

[1989] The Nineteenth International Symposium on Fault-Tolerant Computing. Digest of Papers Pub Date : 1989-06-21 DOI:10.1109/FTCS.1989.105576

R. Horst

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引用次数: 7

摘要

讨论了串联直达VLX处理器的缓存和控制存储器的设计。采用热备冗余技术提高大型静态RAM阵列的可靠性，降低了业务成本。自动执行故障ram的检测、隔离和备用替换，而不会中断正常处理。描述了一种节约控制存储的设计方法。利用数学模型预测了每个处理器板的多阵列的可靠性改进。该模型考虑了所选择的维修策略，该策略要求仅在备用耗尽或非备用逻辑失效时更换单板。通过模型预测和现场故障数据，说明了所选方法的成功。

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Reliable design of high-speed cache and control store memories

The design of the cache and control store memories of the Tandem NonStop VLX processor is discussed. Service costs are reduced by using hot-standby sparing to improve the reliability of the large static RAM arrays. Detection, isolation, and spare substitution of failed RAMs are performed automatically without the disruption of normal processing. A control store design with sparing is described. A mathematical model is used to predict reliability improvements for the multiple arrays for each processor board. The model takes into account the selected repair policy which calls for replacing a board only on spare exhaustion or on the failure of nonspared logic. The success of the chosen approach is illustrated through model predictions as well as through field failure data.<>

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[1989] The Nineteenth International Symposium on Fault-Tolerant Computing. Digest of Papers

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