A. Carlucci, S. Grivet-Talocia, Scott Mongrain, Siddarth Kulasekaran, K. Radhakrishnan
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A Structured Krylov Subspace Projection Framework for Fast Power Integrity Verification
This paper presents a model order reduction approach, specifically designed for the generation of compact and efficient transient simulation models of system-level power distribution networks (PDN) of multicore processor systems. The proposed approach applies a Krylov subspace projection, with a structure that is adapted to a block-coupled state-space description of individual PDN subsystems. The latter include board-package, averaged models of integrated voltage regulators switching circuitry, and individual models of all cores including regulator inductors and capacitors. Numerical results from pro-posed reduced-order models provide major speedup with respect to SPICE with negligible loss of accuracy.