一种新的位图分析技术——测试灵敏度强度位图

C. H. Gim
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引用次数: 2

摘要

位图是集成电路中易失性和非易失性存储器分析和器件表征的常用工具。测试人员通常提供电气故障地址,分析人员将使用打乱表将电气故障地址转换为物理故障地址。可以使用软件对电气故障地址进行解码,然后使用简单的图形显示故障的物理位置。本文提出了一种新的位图技术。与仅仅显示故障的X、Y物理位置(基本上是二维的)不同,这种位图技术更进一步。新的位图技术“测试灵敏度强度(TSI)位图”是所有列出的工具的图形组合。与简单的数据转储内存显示相比,使用图形位图的想法是,当测试条件从宽松条件变化到非常严格的条件时,可以更容易地可视化故障和故障模式。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A novel bitmap analysis technique - test sensitivity intensity bitmap
Bitmapping is a common tool used for analysis and device characterisation on volatile and non-volatile memory in integrated circuits. The tester normally provides the electrical failing address and the analyst will use a scramble table to convert the electrical failing address to the physical failing address. A software may be used to descramble the electrical failing addresses and then display the physical location of the failure using simple graphics. In this paper, a novel bitmap technique is presented. Instead of just displaying the X,Y physical location of the failure, which is basically two dimensions, this bitmap technique takes it a step further. The new bitmap technique 'test sensitivity intensity (TSI) bitmap' is a graphical combination of all the listed tools. The idea of using a graphical bitmap was to make it easier to visualise the failure and the pattern of the failure as test conditions change from relaxed conditions to very stringent conditions, compared to a simple data dump memory display.
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