900MHz至1.2GHz两相谐振时钟网络与可编程的驱动程序和加载

IEEE Custom Integrated Circuits Conference 2006 Pub Date : 2006-09-01 DOI:10.1109/CICC.2006.320995

Juang-Ying Chueh, V. Sathe, M. Papaefthymiou

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引用次数: 11

摘要

采用0.13 μ m CMOS技术设计了具有可编程驱动器和负载的谐振时钟网络。2mm × 2mm分配网络具有片上电感器，并在900MHz至1.2GHz范围内可编程的参考时钟速率下执行强制振荡。时钟振幅和能量效率权衡在和关闭共振探索与各种驱动器配置。每周期的能源效率比以前的谐振配电网络高1.39到1.56倍

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900MHz to 1.2GHz Two-Phase Resonant Clock Network with Programmable Driver and Loading

A resonant clock network with programmable driver and loading is designed in a 0.13mum CMOS technology. The 2mm times 2mm distribution network has on-chip inductors and performs a forced oscillation at the rate of a reference clock programmable in the 900MHz to 1.2GHz range. Clock amplitude and energy efficiency trade-offs at and off resonance are explored with various driver configurations. Energy efficiency per cycle is 1.39 to 1.56 times greater than previous resonant distribution networks

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IEEE Custom Integrated Circuits Conference 2006

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